majo go Posted March 22, 2018 Report Share Posted March 22, 2018 Hallo, I have simple problem with the output of signal in the schematic of Xilinx. I've started Xilinx from the simple default Blink file and wand to connect the clk_96Mhz from the ZPUino Soft Processor to D12 of the Pinout. Everything I tried is going to be an error. Can someone explain me how to do this; ore have a good “tutorial” which is using the Papilio. I want to do this in the schematics to understand how to do this. Quote Link to comment Share on other sites More sharing options...
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