lofatt Posted December 1, 2017 Report Share Posted December 1, 2017 (edited) I have watched several of Jacks videos and followed them to a t with no good results when synthesizing or generating a program file in ISE designsuite14.7. The last one I attempted was Creating a new ZPUino SOC project. I did save as a new project to be able to modify read only files. ISE comes up with several errors including bram errors and wont finish creating the bitfile. I have tried editing other designlab example projects with the same type results. For instance I have the vga8 wing and papilio pro spartan6lx9, edited that working project with ISE, did nothing to it and tried to synthesize and create program file, same type errors. These were all working projects that I loaded to the papilio pro and ran with designlab and Zap2.3, with exception of the Creating a new ZPUino SOC project. I am trying to create a zpuino with vga and 2 uart/com ports. I dont know if i'm doing something wrong or the newer ISE design suite14.7 doesnt want to work these older Zap and designlab programs. Maybe I missed a step or need setup something in ISE? Thanks for any help.. Edited December 8, 2017 by lofatt Clarify Quote Link to comment Share on other sites More sharing options...
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