jlcollado Posted September 13, 2016 Report Share Posted September 13, 2016 If I want to use the FTDI Port B of the FPGA USB port as a serial to USB converter connected to a PC, I understand that I have to use signals BD0 (TXD), BD1 (RXD), BD2 (RTS) and BD3 (CTS) mapped to pins 46, 141, 140, 138 of the FPGA (for full hw handshake). Am I correct ? Is there any interference with the normal Papilio Loader programming ? Regards, José Luis. Quote Link to comment Share on other sites More sharing options...
Jack Gassett Posted September 14, 2016 Report Share Posted September 14, 2016 Hello José, This should work just fine, you can probably get away with just the TXD and RXD pins depending on the device you are communicating with... The JTAG programming pins are connected to Port A of the FTDI 2232 chip so there will not be any interference with normal Papilio Loader operations. Thanks! Jack. Quote Link to comment Share on other sites More sharing options...
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