sleary78 Posted September 8, 2015 Report Share Posted September 8, 2015 Hi, I've been trying to get flashrom v0.98 working with the papilio pro with not much luck. I had Jumper 4 closed off and tried flashing the boundary scan bit file with the loader too. No luck. Im not satisfied with the bitmerge approach to the flash rom management and i'm looking for other tools to manage this. One thing i did notice while trying to diagnose the issue is that the wiki page says.. Channel A is connected to the Papilio Pro in an Asynchronous serial UART configuration that is capable of speeds up to 2MHz.Channel B is connected to the JTAG pins of the Papilio Pro and provides very fast programming of the FPGA (500mS). However the circuit diagram shows the JTAG pins connected to port A. Could this be updated? If anyone has had any luck with flashrom program let me know. I also have a bunch of other JTAG programmers (Xilinx USB and USB Blaster) if anyone has had success with them. CheersStephen Output from flashrom.. stephen@debiandev:~/svnwork/flashrom$ sudo ./flashrom -p ft2232_spi:type=2232H,port=A -V -c MX25L6436E/MX25L6445E/MX25L6465E/MX25L6473Eflashrom v0.9.8-r1896 on Linux 3.16.0-4-amd64 (x86_64)flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.2.1, GCC 4.9.2, little endianCommand line (5 args): ./flashrom -p ft2232_spi:type=2232H,port=A -V -c MX25L6436E/MX25L6445E/MX25L6465E/MX25L6473ECalibrating delay loop... OS timer resolution is 1 usecs, 1479M loops per second, 10 myus = 15 us, 100 myus = 148 us, 1000 myus = 1417 us, 10000 myus = 8582 us, 4 myus = 5 us, OK.Initializing ft2232_spi programmerUsing device type FTDI FT2232H channel A.FTDI chip type 2 is not high-speed.Set clock divisorMPSSE clock: 12.000000 MHz, divisor: 2, SPI clock: 6.000000 MHzNo loopback of TDI/DO TDO/DISet data bitsThe following protocols are supported: SPI.Probing for Macronix MX25L6436E/MX25L6445E/MX25L6465E/MX25L6473E, 8192 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffffNo EEPROM/flash device found.Note: flashrom can never write if the flash chip isn't found automatically. Quote Link to comment Share on other sites More sharing options...
sleary78 Posted September 8, 2015 Author Report Share Posted September 8, 2015 Ok i think i have the issue here.. The wiki says.. "The Papilio Pro includes a reset header (JP4) that can be populated with a jumper to hold the Spartan 6 FPGA in permanent reset mode. This frees up the JTAG Header to be used as an FT2232 JTAG/SPI/MPSSE Programmer." Unfortunately this doesnt seem to work. With a jumper in place i still get ID's back from the Spartan 6 and cannot see the SPI Flash on the JTAG chain. If the above statement is not accurate could we remove it from the wiki? I've spent quite a bit of time trying to solve this one (and nagged the flashrom guys) and it appears that the hardware doesnt support direct access to the SPI flash. I'd rather others didnt do the same. Quote Link to comment Share on other sites More sharing options...
mkarlsson Posted September 8, 2015 Report Share Posted September 8, 2015 Flashrom can not program the flash chip on Papilio Pro since it expects the flash chip to be directly connected to the FTDI chip and use the MPSSE module in SPI mode. On Papilio Pro the flash chip is connected to the FPGA, not to the FT2232D device. The FT2232D device is connected to the FPGA JTAG port and the MPSSE module is used in JTAG mode. The only way to program the flash chip via the FT2232D is to first download a special bit file to the FPGA that translates JTAG commands to SPI transactions. This bit file is typically called bscan_spi_xxxx.bit where xxxx indicates which FPGA device this bit file is for. This is what the Papilio loader does (as well as other programmers like xc3sprog and fpgaprog). Ok i think i have the issue here.. The wiki says.. "The Papilio Pro includes a reset header (JP4) that can be populated with a jumper to hold the Spartan 6 FPGA in permanent reset mode. This frees up the JTAG Header to be used as an FT2232 JTAG/SPI/MPSSE Programmer." Unfortunately this doesnt seem to work. With a jumper in place i still get ID's back from the Spartan 6 and cannot see the SPI Flash on the JTAG chain. If the above statement is not accurate could we remove it from the wiki? I've spent quite a bit of time trying to solve this one (and nagged the flashrom guys) and it appears that the hardware doesnt support direct access to the SPI flash. I'd rather others didnt do the same. This instruction if for when you want to use the Papilio Pro as a stand-alone JTAG programmer for some other board. In this case the FPGA is held in reset to effectively disconnect it from the JTAG signals so they can control some other external device (like an ARM microcontroller or an AVR microcontroller) or program an external SPI flash chip. Again, you can not program the Papilio flash this way since it's not connected directly to the FT2232D. Hope this helps,Magnus Edit: Xilinx call this "Indirect programming" and talks about it in this document: http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/pim_c_introduction_indirect_programming.htm Quote Link to comment Share on other sites More sharing options...
Jack Gassett Posted September 8, 2015 Report Share Posted September 8, 2015 Exactly, thank you for the explanation Magnus. There are two big challenges with using Flashrom with the Papilio Pro: 1) MPSSE only works on channel B of the FT2232D and on the pro those MPSSE signals are connected directly to the JTAG pins which are not general GPIO pins after configuration. The only way to use the MPSSE pins for other purposes is to hold the FPGA in reset and then use JTAG header on the Papilio Pro board to physically connect jumpers to whatever you are programming. Or, to use the BSCAN primitive to effectively turn those JTAG pins into GPIO, like is done with bscan_spi_xxxx.bit but that gets complicated and is a nightmare to get working correctly... I actually attempted to get Flashrom working this way once and gave up when I realized it would require some changes on the Flashrom side...2) The onboard SPI Flash is not directly connected to the MPSSE pins of the FT2232D, it is connected to the SPI configuration pins of the Spartan6 because its purpose is to load a bit file to the FPGA at startup... Now, using the Papilio DUO with Flashrom is significantly easier, almost trivial most likely. The FT2232H chip used in the Papilio DUO supports MPSSE mode on both channel A and channel B. While channel B is still connected to the JTAG pins of the FPGA channel A has all of the MPSSE pins connected to FPGA GPIO pins! So this means that all you have to do is load a bit file that connects up the MPSSE pins however you want it to. In your scenario you would just connect the MPSSE pins to the pins that the SPI Flash is connected to and then in Flashrom you would just need to specify that you want to use Channel A instead of Channel B. Or you could connect a ZIF socket and load a bit file that connect the MPSSE pins to the correct locations on the ZIF socket to program a supported chip. Much easier to deal with when using the Papilio DUO and FT2232H chip. Jack. Quote Link to comment Share on other sites More sharing options...
mkarlsson Posted September 8, 2015 Report Share Posted September 8, 2015 Jack, I think you have the channel A/B swapped in your explanation above. FT2232D only has an MPSSE engine on channel A. From the FT2232D data sheet: 8.5 Multi-Protocol Synchronous Serial Engine (MPSSE) Mode Signal Descriptions and Interface Configurations MPSSE Mode is designed to allow the FT2232D to interface efficiently with synchronous serial protocolssuch as JTAG and SPI Bus. It can also be used to program SRAM based FPGA‟s over USB. The MPSSEinterface is designed to be flexible so that it can be configured to allow any synchronous serial protocol(industry standard or proprietary) to be interfaced to the FT2232D. MPSSE is available on channel A only.MPSSE is fully configurable, and is programmed by sending commands down the data pipe. These can besent individually or more efficiently in packets. MPSSE is capable of a maximum sustained data rate of5.6 Mega bits / s Magnus Quote Link to comment Share on other sites More sharing options...
Jack Gassett Posted September 8, 2015 Report Share Posted September 8, 2015 Ah, yes, that is right, I do have them swapped. Thanks! Jack Quote Link to comment Share on other sites More sharing options...
offroad Posted September 8, 2015 Report Share Posted September 8, 2015 Don't know if this is the answer to the right problem, but I think xc3sprog worked pretty well with the FTDI chip (also Xilinx interface) and I also remember using it to rewrite only parts of the flash contents. Quote Link to comment Share on other sites More sharing options...
sleary78 Posted September 9, 2015 Author Report Share Posted September 9, 2015 All, Thanks for the explanation. It hadn't occurred to me to use the Papilio Pro as a programmer for things not on the board. I'd assumed the programmer was for programming things on the board already! The xc3sprog may be the way to go. Although i'd be happy with read-modify-write cycle. But the papilio programmer doesnt have an obvious "read out contents of chip" feature. CheersStephen Quote Link to comment Share on other sites More sharing options...
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