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I stumbled over something interesting, a CPU called J1 that runs FORTH code and has been demoed on Xilinx FPGAs.

What got my attention is that the Verilog code is very short, clean and (at least at first glance) professionally written.

I downloaded gforth 0.7.0 and managed to compile the demo code (firmware folder) into a memory image without much hassle (via gforth.exe -e "include main.fs bye").

There is also pretty good documentation here, with crosslinks. For example, clicking on the opcodes here shows (at least that's what I think) how they map to hex words.


This could be promising for example as replacement for RTL state machines.

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Hi Offroad,


The J1 is indeed a very compact implementation of a versatile high speed stack processor.  James Bowman has proven it's track record using it as an embedded application specific controller within the Gameduino graphics and audio shield for Arduino.


It's fairly close to the embodiment of the exotic Forth procesors that Chuck Moore and Jeff Fox (& others) worked on in the early 1990s - with modern FPGA tools making this all possible for the man in the street - the democratisation of FPGA hardware and open source tools.


Thanks to Jack, we now have our own small area of this forum to discuss the J1 and it's derivatives. Hopefully we can find a multitude of applications for this cpu and get a whole new generation of people exploring soft cores and stack based languages - as an alternative to ARM and C.


Here is the link to the new J1 forum topic








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