AVR to FPGA to Logic Shield almost working...


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I am trying to make a simple project in which the (real) AVR sends data to the FPGA, which in turn outputs it on the LogicStart Shield LEDs (as a proof of concept before trying something more complicated):


The arduino AVR program increments a counter every 100ms, whose value is output to the Switch positions on the logic shield. The arduino output pins used for counter bits 0 to 7 in turn are {0,1,2,3,4,42,44,46}. (Shield switches are all up as per instructions; other Arduino pins are set as inputs to prevent any clashes).


An FPGA schematic then connects the Switches to the LEDs on the Logic shield, to display the counter.


It's almost working but not quite. The low order 5 leds show the count as it increments, as intended, but the 3 high order leds are always on and do not change. 


The part of the UCF which maps these inputs to the LEDs via


looks like


NET SW(0)            LOC="P116" | IOSTANDARD=LVTTL;
NET SW(1)            LOC="P117" | IOSTANDARD=LVTTL;
NET SW(2)            LOC="P118" | IOSTANDARD=LVTTL;
NET SW(3)            LOC="P119" | IOSTANDARD=LVTTL;
NET SW(4)            LOC="P120" | IOSTANDARD=LVTTL;
NET SW(5)            LOC="P62"  | IOSTANDARD=LVTTL;
NET SW(6)            LOC="P59"  | IOSTANDARD=LVTTL;
NET SW(7)            LOC="P57"  | IOSTANDARD=LVTTL;
NET LED(0)           LOC="P55"  | IOSTANDARD=LVTTL;
NET LED(1)           LOC="P50"  | IOSTANDARD=LVTTL;
NET LED(2)           LOC="P47"  | IOSTANDARD=LVTTL;
NET LED(3)           LOC="P121" | IOSTANDARD=LVTTL;
NET LED(4)           LOC="P123" | IOSTANDARD=LVTTL;
NET LED(5)           LOC="P124" | IOSTANDARD=LVTTL;
NET LED(6)           LOC="P126" | IOSTANDARD=LVTTL;
NET LED(7)           LOC="P127" | IOSTANDARD=LVTTL;
Apart from renaming the nets and omitting some stuff about drive and slew, these look to be the same as in the Logic Shield ucf. However, I have also left other definitions in from the standard papilio duo ucf, as if I omit them, the AVR's programming port no longer shows up.
I'm wondering if there is some clash of use of pins here? However, the logic start shield does say you are free to connect a wing to the switch pins, which makes me think my approach should work.
Any insight as to what is going wrong gratefully received - and I suspect it will help other beginners to who are trying to pass data from the AVR into the FPGA.
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OK, I think I have got it. Some pins listed for "Arduino" are only for the Arduino Core running on the FPGA, not for the AVR, which has fewer outputs than the Arduino Core. So, it looks like my plans to drive the FPGA from the AVR will be have to be revised. I guess I can repurpose some of the Logic Start Shield directional buttons which seem to be connected to the AVR.


Postscript: I did exactly that and it all now works fine.

Data is now transferred on AVR/Arduino pins {0,1,2,3,4,10,11,12}

NET SW(5)-SW(7) now connect to pins P131, P132, P133.



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Great, thanks. The project works fine, but I was a little puzzled at first to find only 5 OBUFs when I expected 8!


Then I realised what is going on.

Arduino outputs 0,1,2,3,4 connect to FPGA inputs then go via OBUFs to FPGA outputs labelled Arduino 48,50,52,5,6, to drive LEDS 0-4. 

However, the Arduino drives pins 7,8,9 directly as LEDs 5-7 are connected to those pins. The FPGA is not involved for these signals.


So, some lines go via the FPGA, and others don't. Tricky!  :)


Anyway, thanks Jack, this is all becoming a lot clearer now. I'm sure these examples will help plenty of others too.

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Yeah, sorry about it being a little tricky, I thought about using the directional buttons but I didn't remember how I connected them. I looked at the schematic and they use pulldown resistors so it's safe to re-use them. Here is an updated version of the project that connects all 8 pins through the FPGA.




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