Math-free digital clock.

[hamster]

I'm building a jumbo LED clock, using Seeed Studio's 8" 7-segment LEDs, and a Papilio One 250K to control the PCBs with the LED drivers on them.

 

So far I've implemented the digital clock, displaying on a LogicStart, but to add a twist I've not used any addition or subtraction anywhere in the design.

 

http://hamsterworks.co.nz/mediawiki/index.php/Math_free_digital_clock

[johnbeetem]

Using LFSRs, huh?  Isn't that replacing simple arithmetic with polynomial division?  That sounds a lot a lot more "mathy" to me

 

Didn't an early TI microprocessor use an LFSR as a program counter to save transistors?  It meant the assembler needed to re-arrange the instructions into the correct pseudo-random sequence.

[Jaxartes]

@johnbeetem: I'd assume "math-free" really means "numeric-arithmetic-free."

 

And one advantage of working with polynomials modulo 2, as in LFSRs and CRCs, is that the analogues to addition and multiplication are exclusive-OR, AND, and shift.  There's no carry.  And if you use Galois-style LFSRs instead of the more popular kind, you can keep the logic depth constant, which might help you achieve a high clock rate.

 

It might not save you very much on an FPGA, though, which has stuff like hardware carry chains to speed up addition.  In a book I read, the author tested various counters for maximum clock rate, and found the LFSR to actually be a little slower than the binary counter, and use more LUTs, though fewer slices.

 

@hamster: Kewl.  So, is the 'lfsr <= "0111110111010111001000000"' in pulse_per_second.vhd meant to shorten the cycle from 2^25-1 to 32 million clocks?