hib1 Posted November 7, 2014 Report Share Posted November 7, 2014 In the FPGA book “Introducing the Spartan 3E FPGA and VHDL” by Hamster the Project 10.7, Binary up counter, does not give any VHDL code. It says “Using the above template, extend the project to use a 30-bit counter ("29 downto 0"), displaying the top 8 bits on the LEDs”. Does anyone have VHDL code for this or a similar counter that will display data on LEDs on the Logic Start board or on pins of the Papilio One? Quote Link to comment Share on other sites More sharing options...
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