stonechild Posted October 5, 2014 Report Share Posted October 5, 2014 In Chapter 14 of Mike Field"s "Introducing the Spartan 3E FPGA andVHDL" the notation NET "anodes<0>" LOC="P18"; is used in the constraint file I don't understand what this way of expressing a constraint means as opposed to NET switches(7) LOC = "P91" | IOSTANDARD=LVTTL; I've looked around and can't figure out what the "<>" indicate. Quote Link to comment Share on other sites More sharing options...
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