Meaning of NET "anodes<0>" LOC="P18";


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In Chapter 14 of Mike Field"s  "Introducing the Spartan 3E FPGA and

VHDL" the notation NET "anodes<0>" LOC="P18"; is used in the constraint file  I don't understand what this way of expressing a constraint means as opposed to NET switches(7) LOC = "P91" | IOSTANDARD=LVTTL; I've looked around and can't figure out what the "<>" indicate.
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