UCF syntax question


hib1

Recommended Posts

I raised this question earlier but received  no replies re: "Introducing the Spartan 3E FPGA and
VHDL."
 
Please tell me what is the difference is between the UCF  notation with < > symbols vs. the notation with "  "  symbols?   notation 1 is in book, but notation 2 is in some other sample code I received.
 
Also, it appears that "IOSTANDARD=LVTTL" is not required.
 
notation 1 from the book:
NET LED_1 LOC = "Pxx" | IOSTANDARD=LVTTL;
NET LED_0 LOC = "Pyy" | IOSTANDARD=LVTTL;
 
 
notation 2:
NET "LED<1>"   LOC="Pxx" 
NET "LED<0>"   LOC="Pyy"
 
 
Link to comment
Share on other sites

Notation 1 specifies two signals, LED_1 and LED_2.

Notation 2 specifies a bus LED with two signals.

 

The corresponding HDL code must match the ucf file.

 

VHDL:

 

entity XXX is
  port (
    LED                 : out   std_logic_vector(1 downto 0);
    LED_1               : out   std_logic;
    LED_2               : out   std_logic;
    );
end;

 

Verilog:

 

module XXX (

  output [1:0]    LED,

  output          LED_1,

  output          LED_2

);

 

Magnus

Link to comment
Share on other sites

Join the conversation

You can post now and register later. If you have an account, sign in now to post with your account.

Guest
Reply to this topic...

×   Pasted as rich text.   Paste as plain text instead

  Only 75 emoji are allowed.

×   Your link has been automatically embedded.   Display as a link instead

×   Your previous content has been restored.   Clear editor

×   You cannot paste images directly. Upload or insert images from URL.