offroad Posted July 26, 2014 Report Share Posted July 26, 2014 Hi, it can be surprisingly difficult to get started with a simple, embedded CPU without the luxury of infrastructure such as debugger or bootloader. One challenge is the toolchain between C code and the physical memory where the program code goes. Especially the last step can be hard and Xilinx' buggy data2mem utility doesn't exactly make it any easier. Attached a simple example project with a medium-size ZPU that blinks the LED. It's maybe not the world's most powerful processor, but it leaves 80 % of the LX9 FPGA available for RTL (for comparison: The "small" zpu variant would leave 90 % free, but it is much slower). One port of the dual-port RAM is left unused, so it's fairly easy to connect other blocks via shared memory (i.e. move the start of the stack back to leave some space). Also, connecting hardware to the processor's external bus is probably as easy as it can get, like in the good ol' days when you'd do this with a soldering iron and a GAL16V8 as address decoder...The archive includes several configurations, for different memory size, together with a data2mem input file. See the README file. The turnaround cycle for C compilation / bit stream merging / uploading is fairly quick, less than one second on Papilio Pro.This makes it interesting for example to control RTL under development, as pattern generator, to check the output etc. I will probably add a UART and / or a RGB display for my own use, but let's post this now while it is all nice and simple EDIT: upload revised (rtl/mem folder fixed)ZPU_medium_tar.gz Link to comment Share on other sites More sharing options...
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