Papilio Sigma-Delta ADC

[joesugar]

Hello everyone.  I've had a Papilio One for a while now but this is the first time I've had a question I'm hoping some of you can help with.

 

I'm working on implementing an amateur radio PSK31 transceiver in a Papilio One using the ZPUino soft core.  I have the transmit portion working and have started working on the receive portion.  To minimize the external hardware required I'd like to implement a sigmal-delta A2D converter.  I've run across lot's of articles that discuss the theory but no actual code (be it Verilog or VHDL).  Has anyone here implemented such a beast?  Can you point me in the right direction for examples I can use as a basis?

 

Thanks for any help or direction you can provide,

Joseph

[hamster]

I did try this once, but got really poor results, but due to my ineptness rather than any technology limitation that I could identify. You have most probably already found these resources:

 

http://www.latticesemi.com/~/media/Documents/WhitePapers/AG/CreatingAnADCUsingFPGAResources.PDF

 

http://www.eetimes.com/document.asp?doc_id=1278518

[TomKeddie]

I did try this once, but got really poor results, but due to my ineptness rather than any technology limitation that I could identify. You have most probably already found these resources:

http://www.latticesemi.com/~/media/Documents/WhitePapers/AG/CreatingAnADCUsingFPGAResources.PDF

http://www.eetimes.com/document.asp?doc_id=1278518

dude this site is full of crazy cool s$&t you've done, don't call yourself inept.

[hamster]

Oh, and if you want real insperation, have a look at page 28 of:

 

http://issuu.com/xcelljournal/docs/xcell_journal_issue_84

 

An entire FM radio using 5 passive components.

[joesugar]

You're correct, I have the first two but WOW, how did I miss the third?

 

My original idea was to use a direct conversion receiver feeding the ADC but downconverting the sigma-delta bit stream directly within the FPGA is something that never occurred to me.  Definitely going to pursue this.

 

Thanks for the information.

[OmniTechnoMancer]

You might have some issues getting a high enough sample rate if you are doing MHz frequency sampling...

[offroad]

Well, "FM" and "ADC" is maybe a bit misleading. True, it does convert antenna to digital. But FM doesn't have amplitude information, you can take the sign (1 bit) and not lose anything.

Anyway, the differential input looks interesting. With that and some kind of DAC (i.e. a RGB wing), one could build an AD converter.

[hamster]

You might have some issues getting a high enough sample rate if you are doing MHz frequency sampling...

 

For bonus points you could try DDR, and get more than 400 Mb/s should be more than enough for broadcast FM.

 

'Abusing' the differential input as a one bit ADC has been used many times - e.g. this homemade GPS receiver http://www.aholme.co.uk/GPS/Main.htm

[joesugar]

You might have some issues getting a high enough sample rate if you are doing MHz frequency sampling...

 

I was thinking about converting the signal to a single-bit data stream using a sigma-delta circuit, then use a digital down-converter to move the frequencies of interest down to baseband before filtering.  Since it's similar to a sigma-delta ADC I hoping to get similar performance.

[OmniTechnoMancer]

I was thinking about converting the signal to a single-bit data stream using a sigma-delta circuit, then use a digital down-converter to move the frequencies of interest down to baseband before filtering.  Since it's similar to a sigma-delta ADC I hoping to get similar performance.

 

The issue is more that in order to get the conversion noise far enough away from your signal you need to oversample by a significant margin, this will require several hundred megasamples per second to get input on the order of a few MHz, you could try band pass sampling, but for that to work you will need a band pass filter on the input.