Papilio Pro bscan bitfile source code?

[joosteto]

I'm trying to build the ./bscan_spi_xc6slx9.bit file from source, to program the flash on my Papilio Pro board.                                            
                                                                                                                                                           
From the git source, the only .v or .vhdl source file for Spartan 6 is:                                                                                    
  ./xc3sprog/trunk/bscan_spi/bscan_s6_spi_isf_ext.v                                                                                                        
Is this the one I should use?                                                                                                                              
                                                                                                                                                           
Then for the User Constraints File, the only relevant one I can find is the generic one,                                                                   
    
                                                                                                                                                           
The two files obviously don't match, so I from the .ucf file I removed everything                                                                          
except the FLASH_* lines.
And in the .v file, I replaced all the MOSI/MISO lines with the FLASH_SI/SO etc lines, like:
module top
  (
   output wire FLASH_SI,  //MOSI,
   output wire FLASH_CS, //CSB,
   output wire FLASH_CK, //DRCK1,
   input  FLASH_SO //MISO
   );
(and all other places)

The resulting .v & .ucf files do generate a bscan .bit file, but when I use that to program
the flash, I get this:

./papilio-prog -f ../Helper_App/Quickstart-Papilio_One_LX9-v1.5.bit -b ~joostje/VHDL/bscan-Papilio/top.bit -v
Using built-in device list
JTAG chainpos: 0 Device IDCODE = 0x24001093     Desc: XC6SLX9

Uploading "/home/joostje/VHDL/bscan-Papilio/top.bit". DNA is 0xb9c95021930a5ffe
Done.
Programming time 547.0 ms

Programming External Flash Memory with "../Helper_App/Quickstart-Papilio_One_LX9-v1.5.bit".
Uknown Flash Manufacturer (0x00)
Error: SPI Status Register [0x00] mismatch (Wrong device or device not ready)..
Error occured.
USB transactions: Write 178 read 10 retries 8


Using the original bscan_spi_xc6slx9.bit does work:


As for the reason why I want to build the source (apart from "I should be able to"),
I'm using a modified Papilio board design with a Spartan XC6SLX16 (256 pin BGA),
So I need to generate a new bitfile for that XC6SLX16.

So, doesn anyone know where the .v or .vhdl source files (preferably with a .ucf file) are that
can generate a .bit file for the Spartan 6 (Papilio Pro)?

Papilio-Loader source was this morning cloned from here:
  https://github.com/GadgetFactory/Papilio-Loader.git

 

(I've attached my modified .ucf and .v files, both renamed to .txt as the uploader didn't like my .ucf extention)

Thanks,
joost
 

BPC3011-Papilio_Pro-general.txt

bscan_s6_spi_isf_ext.txt

[mkarlsson]

papilio-prog is not the same as xc3sprog.  papilio-prog was forked off from xc3sprog way back and is using a different bscan file.

I have attached  a zip file with the vhdl source file as well as the ucf file for the qfp144 package.

 

Hope this helps,

Magnus

bscan.zip

[joosteto]

Thanks Magnus!

 

Yes, the .vhd and .ucf files you provided do work.

 

I do know papilio-prog uses a different bscan file, but somehow I couldn't find any other .vhd or .v files in the papilio-prog source code.

I now see that the file you sent is actually present in the git repository (although the one from git looks like an older version), so

I apologize.

 

Thanks for the quick help!

[mkarlsson]

No worries, we have all been there.