bzuiss Posted April 7, 2014 Report Share Posted April 7, 2014 Hi, I have been developing for the Papilio for several months now but I am a little confused about reading digital inputs from the headers. In my ucf file I have an input "mux" that needs to read 3.3V logic. NET mux LOC="P85" | IOSTANDARD=LVCMOS33; I was using the megawing ucf as comparison but the syntax seems slightly different. NET SWITCH(5) LOC="P2" | IOSTANDARD=LVTTL; NET SWITCH(6) LOC="P3" | IOSTANDARD=LVTTL; NET SWITCH(7) LOC="P4" | IOSTANDARD=LVTTL; As of now, putting 3.3 volts from a DC power supply into my mux input is not registering at all, does anyone know why this might be happening? Link to comment Share on other sites More sharing options...
alvieboy Posted April 7, 2014 Report Share Posted April 7, 2014 Perhaps if you can share the VHDL code we can have more insight. Also note: the inputs are vey high impedance, so unless you add a pulldown (either in th FPGA or externally) the pin might read always as '1'. Link to comment Share on other sites More sharing options...
Jack Gassett Posted April 7, 2014 Report Share Posted April 7, 2014 Here are a couple ideas: Are you using a common ground? Make sure you have a jumper connected between the ground of the power supply and the ground of the Papilio board. Without a common ground a 3.3V on the power supply might not be 3.3V from the point of view of the Papilio. Even better, don't use a DC power supply; the easiest way to test for a high logic level is to use one of the 3V3 pins on the Wing Headers. Just jump between the 3V3 pin and your logic pin and then you don't have to worry about ground because they already have a common ground.In your ucf file use LVTTL for all of your pins.Jack. Link to comment Share on other sites More sharing options...
ayz03 Posted April 13, 2015 Report Share Posted April 13, 2015 hi all .. i am a newbee too .. i faced this digital input problem but have figured it now ... i do not have logicstart mega wing so i did not know the switch configuration until got the schematic of the logicstartmega wing ... this image will clarify the switch arrangement... hope newbies will find it useful .. another thing i read from papilio one that xilinx make Unused pins pulled down by default .. and i have calculated the internal pulled down resistor value which is 1825 ohms. so if any pin is made input it will have a internal resistor Link to comment Share on other sites More sharing options...
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