mkarlsson Posted April 2, 2014 Report Share Posted April 2, 2014 On larger Spartan-6 FPGAs like the LX45 on Pipistrello the bit file loading from flash can take several seconds. However, there are ways to speed this up by changing some of the property setting for the bit file generation task.Here are the steps in ISE to do this:1) Bring up the project in ISE2) Right-click on the "Generate Programming File" task in the processes window pane: 3) Click on "Process Properties", this will bring up a popup window like this: 4) Click on "Configuration Options" 5) Change the "Configuration Rate" from 2 MHz to max value (26 MHz), this will give a 13x speedup 6) Optional (Pipistrello only!) The flash wiring on Pipistrello supports 4-bit wide data transfers so additional speedup can be achieved by changing the "SPI Configuration Bus Width" from 1 bit to 4 bits 7) Click OK and rerun the bit-file generation task to generate a new bit file which will load in a fraction of a second. Enjoy! Magnus Link to comment Share on other sites More sharing options...
This topic is now archived and is closed to further replies.