Matthew Hagerty Posted March 15, 2014 Report Share Posted March 15, 2014 I have been spoiled with the simple SRAM interface for sure. :-) I have also used PSRAM, a.k.a. "Cellular RAM" (SDRAM with a built-in SRAM interface and consistent access time) and it was just as easy as SRAM. I'm now trying to move a design I'm working on to a devboard that only has SDRAM and I'm finding it a big pain to use. What I *think* I'd like to find is an SDRAM controller that provides a consistent access time, similar to what PSRAM offers. Does anyone know of such a controller or have any suggestions on how I might modify an existing one? The access I need is 8-bit and completely random, i.e. burst access of multiple linear bytes in memory are useless. Micron made the SPRAM I used and offers this main feature: "CellularRAM products incorporate a transparent self refresh mechanism. The hidden refresh requires no additional support from the system memory controller and has no significant impact on device read/write performance." It is that second part that is critical "has no significant impact on device read/write performance." I'm wondering what it would take to get an HDL-based SDRAM controller to provide that same feature? 70ns access, "hidden" refersh. I would like to work on this with somone if anyone is interested. Link to comment Share on other sites More sharing options...
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