coryjfowler Posted February 18, 2014 Report Share Posted February 18, 2014 I'm very new to VHDL "programming" and was going though Mike Feild's eBook at my own pace. Using one of the displays at 100% duty cycle has caused it to be noticably dimmer than the other three once I got them all working together... I wondered why this would be so I dug up the schematic and to my dismay, there is nothing to limit the current going through the segments and, even worse, the transistors have no current limiting on the base junction. Its also worth noting that the display gets warm during operation. Had I known this before I began tinkering with the board, I probably would have been a lot more careful with it. Considering this is something that beginners will be using, this is a very bad design... I also seem to have burnt out one of the decimal points as only three of the four light up now. I can see that about ~0.2V would be dropped across the anode transistors' CE junction at saturation and the segments themselves will drop 2.0 to 2.4V but, still, there is no current limiting... LEDs are voltage devices, not current devices; as long as the LED has enough voltage to initiate conduction it will allow the maximum current that the conducting path permits which only seems to be limited by the FPGA in this case. That can equally be as bad for the FPGA, but what is worse is the anode transistors not having a current limiting resistance means the FPGA has ~2.1V across the anode pin and ground when it is active and, again, with the FPGA being the sole current limiting factor... While changing the duty cycle of the display would be a soultion, how many beginners will be thinking of this when all they want to see is the thing show some numbers? Link to comment Share on other sites More sharing options...
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