Jack Gassett Posted February 1, 2014 Report Share Posted February 1, 2014 Hello everyone, I could really use some help with a simple way to describe the new solutions I've been working on for the Papilio. The combination of the Papilio Schematic Library, the ZAP IDE, and the Benchy debugging components are all coming together to create a powerful Open Source solution that needs a simple name that people can instantly get the idea of what its about. We've been plugging away to create something new and it is coming to the point where we need to start getting the word out about what we have, and that starts with an easy to understand message about what it actually is. So what is this new thing? When we put all the pieces together, Papilio Schematic Library, ZAP IDE, and Benchy debugging what we have is a complete system for drawing and debugging electronic circuits on a chip, without the need to learn any HDL. This does already exist out there, its known as Altium Designer, formally LiveDesign. LiveDesign was my very first experience with FPGA's and its what got me hooked in the first place. Back in 2004 they had a special offer where you could buy an FPGA board for $99 and use their graphical LiveDesign software for a year with their board. Everything was great until they stopped selling the boards and I realized that it costs $5K, per year, to use their software! I quickly switched to Xilinx boards and learned VHDL instead, but I never forgot the joy and ease of getting started with FPGA's using their software. Things are finally coming full circle and what we have now is the ability to create a free, Open Source solution that does all of the great things that LiveDesign did. A system that anyone can use for free and everyone is encouraged to contribute to. The Papilio Schematic Library provides a library of components that can wired up by simply dragging and dropping schematic symbols and connecting them by drawing, it eliminates the need to learn VHDL. Benchy components provide the "Virtual Instruments" that can be used to debug the circuits in real time over the JTAG channel. We have a Logic Analyzer, waveform generator, and the next step is to generate an instrument rack using Processing. In that instrument rack I intend to make a Frequency Counter, Frequency generator, 7 segment display, LED's, switches, and pushbuttons. They will all communicate over the JTAG channel and allow us to poke, prod, and debug the circuits running inside the FPGA. Finally the ZAP IDE provides the IDE for coding soft processors and the place to manage all projects and libraries. It ties everything up into one pretty package. This is going to be a really exciting solution that should put FPGA's into the hands of all skill levels. So what should we call it? It's so important to get this right because we can make stuff all day long but if we can't get the word out about this system it will never go anywhere. We need something that uses a simple message to convey what its all about. Something that people can imagine using to solve their problems... The best I've come up with so far is calling it: REDe (Rapid Electronics Design Environment)Draw and debug circuits on a chip with virtual lab equipment on an FPGA. or, REDe (Rapid Electronics Design Environment)A complete system for drawing and debugging electronic circuits on a chip, without the need to learn any HDL. Something along those lines, but it should probably be more poetic. So please, please, please, I can use any help and ideas that you guys have. Thanks!Jack Link to comment Share on other sites More sharing options...
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