programming clock tiles "on the fly"


Chris_C

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I want my VGA controller to be able to change modes, for that I'll need different dot clocks..

what I'd like to be able to do if have a number of in effect modeline entries in a small lookup rom, and from that be able to "poke" settings copied from the clock generator doing different output speeds

is it possible to inhibit a clock tile, then for the fpga to change the ppl table then restart the clock tile?

anyone done this? is it possible? or could bed things happen....

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http://hamsterworks.co.nz/mediawiki/index.php/FreqSwitch - to be exact.  You seem to think along the same lines as me....are you sure that our brains were not twins????

 

If you get a chance, you might want to give "Xilinx UG382 Spartan-6 FPGA Clocking Resources User Guide" a read. (http://www.xilinx.com/support/documentation/user_guides/ug382.pdf) - page 82 has all the gory details for reporgramming.

 

It is pretty short and pretty terse - you most likely won't grok all that it is covering, but it will pique your interest and reveal a whole lot of things that are hidden by the tool chain.

 

For example, high speed serial input or output using a SERDES is a real pain in the bum due to clocking. It is impossible to get working without paying really, really close attention to the documentation in UG382, due to how the highest performing clocking paths are physically connected. It has defeated many a University student :-)

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Hey, Hey! This is just what I need too! I added my signal generator core to Papilio Schematic Library (for sin, cos, square, and saw waves) and wanted to add a frequency generator core too. I did a quick search for how to dynamically change the frequency of a DCM but gave up when I didn't find any easily accessible examples. I know its done in a picoblaze example somewhere but I put it off until I could dig into it. Now maybe I can get the frequency generator added sooner then later!

 

Jack.

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