Powering Down Papilio


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I'm a newbie to FPGA, but I've worked on analog circuit design for many years at major corporations. 

 

I recently got a papilio board to play around with my 10 yr son and so you might see me here with some dumb questions, but please be patient as we're learning :)

 

I want to know what's the correct way to power down the Papilio board even while a design is running. Is it safe to just yank the usb power? And what about FPGA's in general?

 

Thanks

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