Frequency generator


F6EEQ

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I don't remember where i found the link (somewhere in this forum!!) to a XILINX power point about a Frequency generator with MicroBlaze SOC.

 

The presentation seems most interesting but i've been unable to find the VHDL sketches related to this project.

On the presentation it is said to download it but there is no link, and I tried on XILINX site without any success.

 

Could someone help me?

 

Thanks.

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There is this frequency generator project using the DCM. This uses an undocumented feature of the DCM in the Spartan 3E, the Spartan 6 expands on this feature and includes it in the official datasheet. You can control the frequency generated by the DCM in real time.

 

I also worked on a frequency generator a couple years ago, I had it generating perfect sine, cos, square, and saw waves through a delta-sigma DAC. I'm looking to see if I can dig it up, I want to convert it to a wishbone core and release for the ZPUino.

 

Jack.

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Hi Jack!

 

it's exactly this one (your first link).

The schematic is interesting because it explain how you may synthetize a frequency, something like an AD9850 but relatively easy to set-up.

That's why I wanted to get the whole doc, because with the schemeatic it's a little bit difficult (at least for me) to go much further.

 

I had also a look at your second link.

In my ham radio tests, I do not use VHF, but I concentrate on HF, so a 30MHz generator is perfect for me. Would be nice to get some more insight view.

 

Well I'm amazed how you can answer to all these questions, and you or Alvie or Hamster always have the right answer.

Thanks to all.

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Well I will work on it too, may be with a ZAP because it seems to be easier to set up than the pico/microblaze.

 

But I'm still wondering how to get the files (page 6 of the presentation: Design files). May be they are only available with the starter kit?

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Finally I found  all what I needed on XILINX site.

 

Just type "s3esk_frequency_generator.zip" in XILINX site search and you get everything: VHDL, details about µblaze calculations...

 

Still need to understand, but at least this is a very good start!

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  • 3 weeks later...

Hi Jack,

 

I had time to have a deep look at the VHD files for the Xilinx freq generator.

I understood roughly how this works and how the interface is made between the Microblaze and the VHD via signals definition and the use of ports and UCF.

 

Now my question is about ZPU and implementation in FPGA.

 

As far as I could understand, you have two different sketches:

 

One is the quite normal VHDL implementation with all ports, signals, clocks...

Then you must add the processor part with his own program.

This program can be made by using the ARDUINO like soft. But when you wish to implement it, how do you load at the same time in the FPGA chip the VHDL sketch and the "ARDUINO" sketch?

 

I tried to find some hint in the ZP doc on the wiki, but couldn't find what I was looking for.

 

I hope I've been clear enough, but I'm sure I miss something, but I do not know what :( :(

 

Thanks in advance for all the contributors.

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After some tries I think I succeeded loading ZAP sketch in the PP but nothing happens.

 

I found the right com port

I've burned the botloader (some leds light and the RX/TX leds light also). It is said (in the lower window) that this load is successfull.

 

After I load in the IDE the Logic Start sketch, push "load" (in French this is "televerser") with the  the arrow .

The RX/TX leds do not light, but answer is

 

Board: Unknown board @ 96000000 Hz (0xa4041700)
Programming completed successfully in 41.70 seconds.

 

 

But nothing happens, no light, no led...

 

Well, I probably did something wrong but what?

Is there some VHDL code to add somewhere? and UCF?

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