dawnpaul Posted September 10, 2013 Report Share Posted September 10, 2013 Is it possible to realise micro blaze soft IP in papilio one and papilio pro?it is said in xilnix site that micro blaze will run in every xilinix fpga's? Link to comment Share on other sites More sharing options...
mkarlsson Posted September 10, 2013 Report Share Posted September 10, 2013 Sure, you can use Microblaze_MCS which is the free version of Microblaze. Here is an excellent tutorial on how to use Microblaze_MCS on Spartan-6:http://ece.wpi.edu/~rjduck/Microblaze%20MCS%20Tutorial%20v2.pdf Don't forget to change the input clock speed to 32MHz. Link to comment Share on other sites More sharing options...
dawnpaul Posted September 10, 2013 Author Report Share Posted September 10, 2013 Thanks Link to comment Share on other sites More sharing options...
Jack Gassett Posted September 11, 2013 Report Share Posted September 11, 2013 Woah! I didn't realize they added Microblaze MCS to the Coregen wizard of ISE. I had talked to the guy at Xilinx who was pushing for the simplified MCS version to be released, but didn't realize it made it that far! Wow, I need to put it on my task list to make a tutorial for this. Jack. Link to comment Share on other sites More sharing options...
mkarlsson Posted September 11, 2013 Report Share Posted September 11, 2013 Yeah, I did play with it a bit and could synthesize it @ 120 MHz. It's a 3-stage version of the Microblaze core (the high performance version use 5 stages) and is limited to 64 kB program space in bram (no sdram access). It comes with a set of basic peripherals (uarts, timers, interrupt controller etc.) but it's easy to remove their peripherals and/or add our own if you so like. Link to comment Share on other sites More sharing options...
RorschachUK Posted September 12, 2013 Report Share Posted September 12, 2013 Wikipedia also lists a number of free clones [here], although I don't know to what extent they're drop-in compatible or how performance compares. Link to comment Share on other sites More sharing options...
alvieboy Posted September 14, 2013 Report Share Posted September 14, 2013 mkarlsson: what's the size of the design, in slices ? Link to comment Share on other sites More sharing options...
mkarlsson Posted September 14, 2013 Report Share Posted September 14, 2013 I looked at report for one of the systems I created, it had the UART and interrupt controller but no timers nor GPIO, and my own SPI controller. It took up 342 slices on a Spartan-6 at 100 MHz. BTW, Xilinx has a very detailed PDF-document about Microblaze_MCS. http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_1/ds865_microblaze_mcs.pdf Link to comment Share on other sites More sharing options...
mkarlsson Posted September 14, 2013 Report Share Posted September 14, 2013 Also, I have the EDK license for a full Microblaze implementation so if anyone is interested in a specific design I might be able to help out. Link to comment Share on other sites More sharing options...
alvieboy Posted October 1, 2013 Report Share Posted October 1, 2013 Ok, it's indeed small. Is there any quick doc showing the differences to the "normal" microblaze ? I'm getting 328 slices for XTC in area optimization, 100MHz, only an UART. And I am still missing some parts of the design. Link to comment Share on other sites More sharing options...
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