Programming other FPGA's/CPLD's with Papilio


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The Papilio Pro has JP4 which will hold the FPGA in a reset mode which allows you to connect the JTAG pins from the JTAG header to any device you want and use the FT2232 to program them. Any Xilinx part should be supported by the Papilio Loader using this method.

 

Jack.

 

Ah. So there isn't any option like shorting a pin or something for the Papilio One?

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Theoretically we should be able to make a bit stream with the bscan primitive that just passes the jtag pins from the FT2232 through to whatever pins on the FPGA we want. But then the application we use needs to put the FPGA into USER1 JTAG mode for this to work. I've never had time to make this work properly, but it should work... For Papilio One or Papilio Pro.

 

With the Papilio One the FPGA would need to be placed in reset mode, that would probably entail lifting the reset pin and forcing it to reset.

 

Jack.

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  • 8 months later...

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