PRO UCF file

[F6EEQ]

Hi there,

 

I'm slowly understanding how everything works reading Hamster book + some other interesting tutorials.

 

I've a question about UCF files.

 

If I put the whole PRO UCF file (as given in the wiki) ISE returns a whole bunch of errors (at least one error per pin!).

If I put only the three or four pins I'm using in my design all errors disappear as by magic.

 

Is that normal, did I miss something, or did I do something wrong (typing error or the like).

 

Thanks.

[Jack Gassett]

Hello,

 

The Pro UCF file defines all of the pins available on the Papilio Pro, for your design though you will probably not use all of the available pins. The default behavior of ISE is to generate an error when you have defined constraints in the ucf file that do not match with pins defined in your top level VHDL file. In general you should comment out any unused pins from the ucf file.

 

There is a setting that is discussed in the Papilio ISE Getting Started guide that lets you disable that behavior. But it can lead to hard to troubleshoot errors down the road if you make it a habit to use this setting.

 

Jack.

[MicroN8]

I don't use xilinx ise, but in the one I use the box Allow Unmatched LOC Constraints under translate  must be checked or it will not implement the design. Like you said I will get an error for every pin.

In addition the jtag clock must be used for startup and I have to check a box to generate a bit file. This might not apply to Xilinx ise, not really sure. Sorry, I can't be more specific.

[MicroN8]

After posting that I don't use xilinx ise (see above), I thought "Am I missing something by not using it?". So I looked on the forum and found the post about redirecting the shortcut in windows 8 to the 32bit version instead of the 64bit version. Now, as if by magic, I can use xilinx ise. Aldec active HDL is cool, but now I feel like I can get the full FPGA experience.

This is such a great forum and just the place to help reduce the learning curve on FPGA development. My first bit file from xilinx ise is "Hello Papilio" (since world doesn't work on 7 seg display) scrolling on the Logic Start and Papilio Pro. Thanks again Papilio forum. The great community here ( Mr. Gassett, alvieboy and hamster especially) is what convinced me to buy a papilio board.

hello_papilio.bit

[F6EEQ]

Thanks for the answers.

 

That's about what I was figuring out.

I had the same kind of errors with a C compiler if you define variables which are never used.

 

I agree completely with µN8. This is a very nice forum with very precise answers and not all the mess you find on generic ones!

 

Have all a nice WE.

[Jack Gassett]

Thank you guys for the positive feedback, it makes all the effort worthwhile.

 

Jack.