What package to use in xilinx ise for papilio one spartan 3e


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xc3s500e-4vq100 *edit* for a papilio p1 500k.

The speed grade defines the timing performance of the chip (there's a topic about that somewhere around this forum which i could not find now...)

a bitfile built for a slower chip should work on the faster version but not necessarily the other way around.

*edit* http://www.xilinx.com/support/documentation/data_sheets/ds312.pdf details the differences

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