TAG Posted June 4, 2013 Report Share Posted June 4, 2013 I'd like to start looking into adding more chips to the RetroCade Synth. I have had some luck implementing HDL representations of the Atari TIA chip and the 2A03 APU from the NES in a cypress PSoC device, and would like to do the same with the RetroCade Synth. I have done some poking around on the forums, and from what I have seen it looks like the place to start would be to use the Papilio SOC. In theory it looks similar to the way the Cypress PSoC creator works. With that tool I just would create a symbol and define the I/O, then the tool would generate an HDL skeleton file with the IO defined and I just had to paste in the soundchip HDL code. Then I could place the symbol in the schematic editor and draw the connections. For interfacing between the micro-controller and custom peripherals there were symbols for control registers that you could wire to the HDL symbols, you would just write to the control register in the microcontroller application in order to control the peripheral. From what I can tell this is where the wishbone interface comes into play with the Papilio SOC, the details of how this interface works are not clear to me. Can you point me towards some documentation that would help me understand how I would go about controlling new chip peripherals from the ZPUino sketch? As far as the tools I would need to get started, I would need:Papilio SOCISE webpackRetroCade Installer Am I missing anything? Is there a Papilio SOC project for the RetroCade synth that I could use as a starting point?I have seen that there is a branch of the ZPUino for RetroCade synth with the POKEY. A perfect example would be how to create that branch from the standard RetroCade synth by using Papilio SOC. Is Papilio SOC at a point where that would be possible? Does what I am asking make sense? Link to comment Share on other sites More sharing options...
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