Home made GPS

[vaidhya]

Hi all,

 

First of all i am new to FPGA and I am catching up with building simple designs using verilog codes.

 

I have started to build a home made GPS receiver using Papilio one 500k and Arduino mega.

Here is an example i am trying to replicate using my boards

http://www.holmea.demon.co.uk/GPS/Main.htm

 

We can see that the above project is built using custom board, i want to convert this model to work with my Papilio board and Arduino mega so that everyone can do research with it.

To have a start i need to build my RF front-end, then modify the code to implement in my boards.

 

I know i am asking more generic question, but i am happy to receive any idea and suggestion and comments.

First : How to get a kick start on this project?

second : what all the things i need to know ?

 

Advanced thanks to those who are willing to help me out.

[alex]

Since you say you're new to FPGA, I think you've picked quite an ambitious project. You'll notice his Frac7 FPGA board uses a temperature compensated oscillator, as well as having other custom RF circuits on board. The nice thing is that he has published the schematics for both the Frac7 and GPS3 front end so you could try and replicate all this, but you may not be able to use a stock unmodified Papilio.

 

At the very least you'll have to replace the stock oscillator with a TCO version and of course try an build a custom wing adding most of the GPS3 and Frac7 RF circuits to it.

[Logxen]

Here's a project I've been studying that should make a good starting point: http://www.holmea.demon.co.uk/GPS/Main.htm

 

He's got both hardware and code up there.

 

Wow... I need to read the original post a bit better, eh?

[alex]

Wow this forum's so quiet, what's everyone up to lately? Vaidhya, another idea would be, instead of replicating the hardware exactly as per the author's schematics, to try and take advantage of modern IC integration and use an off the shelf GPS front end, for example the Maxim MAX2769B is a:

 

... next-generation Global Navigation Satellite System (GNSS) receiver covering GPS, GLONASS, Galileo, and Compass navigation satellite systems on a single chip. [...] Incorporated on the chip is the complete receiver chain, including a dual-input LNA and mixer, followed by the image-rejected filter, PGA, VCO, fractional-N frequency synthesizer, crystal oscillator, and a multibit ADC. [...] The ADC outputs CMOS logic levels with 1 or 2 quantized bits for both I and Q channels, or up to 3 quantized bits for the I channel.

 

This means you could replace the author's GPS3 and Frac7 boards with a single chip and feed the I/Q into the FPGA of your choice. It depends on what you really want to do, if you just want to play with GPS decoding, you could also consider going the SDR route instead of FPGA.

 

@Logxen

[vaidhya]

Thanks very much for your reply.

Yes, Alex its quite an ambitious project. I am doing my masters in GNSS so i think i can do it.

Yup i was thinking of developing my own frontend and modify Andrews FPGA code to do the signal processing and post processing in Arduino mega board.

Thanks for your valuable idea of using MAX2769B, because i was thinking of using Zarlink GP4020 but it was more complex to handle for me.

I will look into MAX2769B and try to develop an GPS frontend wing for Papilio 500k.

 

Logxen

Thank you, Me too looking into the same project.

 

 

 

 

[alex]

No problem, best of luck with your project. If you decide to go the Maxim way, the chip is less than $9 in singles at Digikey so not a big expense, where the cost will add up is the prototyping board. You could refer to Maxim's evaluation board for an example circuit diagram and board layout (the eval kit is far too expensive to buy at > $600).

 

Additionally have a look at Maxim app notes AN4279 and AN4275 not sure if these boards are available for purchase, if they are it could (potentially) save you building one yourself. On the latter board you'd have to desolder the CP6668AF USB transciever to get access to the raw data pins of the RF front end.