ZPUino 2.0


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We're ultimating the ZPUino 2.0 release right now. Some of the most prominent changes include the new Arduino 1.5 IDE, and a few important changes in HDL code.


One of the changes is support for device identification, which allows the user to scan the available devices using a product and vendor ID, like USB and PCI do.


Here's a sample output from my "systeminfo" sketch, running on a PPro board:

Press ENTER to show system infoSlot 0: ZPUino System ControllerSlot 1: ZPUino UARTSlot 2: ZPUino GPIO ControllerSlot 3: ZPUino Dual Timer Interface with PWMSlot 4: ZPUino SPI interfaceSlot 5: ZPUino 16-Bit Dual SigmaDeltaSlot 6: ZPUino SPI interfaceSlot 7: ZPUino Hardware CRC16 engineSlot 8: No device attachedSlot 9: No device attachedSlot 10: No device attachedSlot 11: No device attachedSlot 12: No device attachedSlot 13: No device attachedSlot 14: No device attachedSlot 15: ZPUino Bootloader CodePPS outputs: 6  PPS0 maps pin 0 of '16-Bit Dual SigmaDelta' in slot 5  PPS1 maps pin 0 of 'Dual Timer Interface with PWM' in slot 3  PPS2 maps pin 1 of 'Dual Timer Interface with PWM' in slot 3  PPS3 maps pin 0 of 'SPI interface' in slot 6  PPS4 maps pin 1 of 'SPI interface' in slot 6  PPS5 maps pin 1 of '16-Bit Dual SigmaDelta' in slot 5PPS inputs: 1  PPS0 maps pin 0 of 'SPI interface' in slot 6

Not only the slot devices can be identified, but also their PPS indexes. This eases the development of libraries.


In conjunction with this a few libraries will be published, including a "BaseDevice" from which you should derive your code classes that are to use wishbone devices, and specify your vendor/product IDs and the instance number. A "DeviceRegistry" class will be avaliable to control which devices are registered to which slots.


All this will be properly documented before 2.0 release.



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Logxen: something simple. Everyone wishing to get his vendor ID just needs to get in touch with anyone with repository RW access, so we can update a master file with all vendor/product IDs (or vendor only).


Vendor IDs are 8-bit, as well as product IDs. This is probably more than sufficient for the near future.




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  • 4 months later...

So how does it compare to the 1.0 code in terms of device utilization?



When I started synthesizing the ZPUino HDL code for my own papilios I was astounded at the number of warnings produced by ISE (which is nothing new, when code gets just a little bit more complex this almost always happens). It is hard to wade through the warnings to find what's actually buggy in your own code...



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Most warnings relate to unused flip flops. This is expected. So nothing is buggy there, just that we are using VHDL in such a way that more unused signals are generated, and properly trimmed by the synthesis tool.


This makes VHDL code more readable, and we trust the tool to do the proper job for us.


I don't have a concrete size utilization comparison, but it should be fairly identical (a few extra LUT for the device identifiers). But nothing much.

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Yeah, the first thing I learned about the Xilinx tools are that they generate an overwhelming amount of warnings. Pretty much every project that was more then a couple of lines ends up drowning you in warning messages. It's so common that someone always brings it up when I go to Xilinx training events... I think one of the goals with the new Vivado ISE is to get a better handle on those warnings.



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  • 5 months later...

Ok guys, after almost a year (!) after, I managed to  publish the 2.0 BETA IDE for testing purposes. It should support 1.0 and 2.0 boards, as well as Arduino AVR and SAM.


It is not up-to-date with Jack's ZAP however.


If you guys could at least do some runs with 1.0 version, that would be excellent. I'll publish some of 2.0 bitfiles shortly.


You can grab the IDE from here: http://alvie.com/zpuino/downloads/2.0/beta/ (win32, linux32, linux64, no mac yet).


If any issue arises, please report it on the github issiue page.



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  • 1 month later...

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