Pre-microprocessor games


james1095

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Is anyone interested in implementing some of the pre-microprocessor games, Pong, Breakout, Tank, etc? It seems like something the FPGA is a natural fit for, since there's no code for a traditional emulator to run.

 

When I first started playing with this stuff I attempted to duplicate the original Atari Pong in a Altera CPLD. I actually got it to the point where the game was playable but I couldn't get the score to advance. Unfortunately I used the schematic entry and Altera-specific modules so the code it produced is not easily ported to Xilinx, however the schematic is available and there's a good writeup out there on how it works.

 

The only catch is that to play it properly you need analog controls. While the ADC on the Logicstart wing would probably do the job, the original paddle circuit is trivially simple, just a 555 and a few passive components for each one. It would be simple enough to make a Pong/Breakout wing with a CMOS equivalent to the 556 dual timer, 3 resistors and a capacitor for the composite video mixer.

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This sounds like a good idea, Pong was my very first experience with a video game when I was a 6 year old. We played that game like crazy!

 

I came across this site a couple days ago, http://mamevhdl.wordpress.com/documentation/

 

I would love to touch base with this guy and learn more about his MAME to VHDL efforts.

 

Unfortunately I found out that my birth Mother has a terminal brain tumor earlier in the week. As you can imagine, I've been spending a LOT of time in the hospital which has put most things on hold...

 

Jack.

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That looks like a fascinating tool that could really speed up getting more games ported to FPGAs.

 

There's a good page about Pong here: http://www.atarihq.com/danb/Pong.shtml

 

The schematic has a few inconsistencies but it's not too hard to spot the errors by comparing to the original (hard to read) scan. He created a simulator that can draw frames of the game by doing gate level simulation. It's far too slow to be playable but it may be a good start for converting to VHDL.

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