Standard clock input on wing?


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Hello, I'm designing a development board and I would like to include a 16bit wing interface. There are certain pins on FPGAs that is optimized for clock input. Is there a standard pin location on the wing that is specified as a clock input?




I went through the Papilio Pro schematic and found the following pins were attached to GCLKs


W1 A2

W1 A3

W1 A12

W1 A13

W1 A14



W1 B4

W1 B5

W1 B10

W1 B14

W1 B15


W2 A9

W2 A10

W2 A11

W2 A12

W2 A13

W2 A14

W2 A15

W2 A16


Which is a surprising number of GCLKs (awesome!). It looks like the pin that is common to them all is 14. So if I were to map an input clock enable pin on at least 14 would this work for wings?





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Hello Dave,


There is not standard for a clock, it looks like pin 14 will work great for the Papilio Pro so I would go for it. The Papilio One might not have GCLK on the same pins though.


The design was routed with other design considerations so I couldn't get fancy with placement of pin functions. I was trying to get as much I/O over an unbroken ground plane as possible. So my main focus was to keep the traces as short and direct as possible without crossing over anything underneath.



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