mubase Posted January 30, 2013 Report Share Posted January 30, 2013 Hi . Continuing with Hamsters book I have come to a standstill with the "Counter" example. I can't work out how to set the counter to a 30 bit counter and display the result on the 7 lowest bits...?I have tried this: entity switches_leds is Port ( switches : in STD_LOGIC_VECTOR (7 downto 0); LEDs : out STD_LOGIC_VECTOR (7 downto 0); clk : in STD_LOGIC);end switches_leds;architecture Behavioral of switches_leds issignal counter : STD_LOGIC_VECTOR(29 downto 0) := (others => '0');begin clk_proc: process(clk)beginif rising_edge(clk) thencounter <= counter+1;end if;LEDs <= counter(7 downto 0);end process;end Behavioral; and other variations but I don't get it...Please can someone help? Link to comment Share on other sites More sharing options...
hamster Posted January 30, 2013 Report Share Posted January 30, 2013 Hi, because the clock ticks at 32Mhz, the lowest 8 bits will just be a blur. Try counter(29 downto 22) if you want to be able to see the counter in action. Also, the assignment of the bits to the LEDs is in the wrong place (in one of two ways): 1. If you wanted to assign the values to the LEDs when the clock ticks (and therefore creating 8 new registers that lags the counter by one cycle) then it should be inside the "if rising_edge(clk) then" construct. 2. If you want to make the current state of the counter visible on the LEDs then you should move it outside of the process, so it is always active. Because of the sensitivity list of the process gets triggered when 'clk' changes, which makes little sense unless the assignment is conditional on the state of the clk. You could also add "counter" to the sensitivity list (e.g. "clk_proc: process(clk, counter)"), but that just seems plain wrong! Link to comment Share on other sites More sharing options...
mubase Posted January 30, 2013 Author Report Share Posted January 30, 2013 OK I got it. Thanks! 0 to 256.Simple change code:entity switches_leds is Port ( switches : in STD_LOGIC_VECTOR (7 downto 0); LEDs : out STD_LOGIC_VECTOR (7 downto 0); clk : in STD_LOGIC);end switches_leds;architecture Behavioral of switches_leds issignal counter : STD_LOGIC_VECTOR(29 downto 0) := (others => '0');begin clk_proc: process(clk)beginif rising_edge(clk) thencounter <= counter+1;LEDs <= counter(29 downto 22);end if;end process;end Behavioral; That works and slowed the display down to human level! I found another tutorial very helpful too. : http://www.ece.unm.edu/vhdl/2012/spring/lab02/lab_manual_tutorial.pdf Now the downwards count and selector switch..! Thanks again,Steve. Link to comment Share on other sites More sharing options...
mubase Posted January 31, 2013 Author Report Share Posted January 31, 2013 As an addition, today I have added 2 switches.Switch 0 pauses the count and switch 1 changes the direction of the count. entity switches_leds is Port ( switches : in STD_LOGIC_VECTOR (7 downto 0); LEDs : out STD_LOGIC_VECTOR (7 downto 0); clk : in STD_LOGIC);end switches_leds;architecture Behavioral of switches_leds issignal counter : STD_LOGIC_VECTOR(29 downto 0) := (others => '0');begin clk_proc: process(clk)beginif rising_edge(clk) thencounter <= counter-1;LEDs <= counter(29 downto 22);if switches(1)='1' then -- if switch 1 is set then counter counts upcounter<=counter+1;end if;end if;if switches(0)='1' thencounter <=counter;end if;end process;end Behavioral; Link to comment Share on other sites More sharing options...
Jack Gassett Posted January 31, 2013 Report Share Posted January 31, 2013 I love that you are sharing this process with us as you go through it. Thank you,Jack. Link to comment Share on other sites More sharing options...
hamster Posted January 31, 2013 Report Share Posted January 31, 2013 Nice illustration how the last value assigned in a process sticks, and how the value of counter doesn't change until the process finished. Perfect to confuse those software types :-)... You could also go... ...LEDs <= counter(29 downto 22); if switches(1) = "01" then counter<=counter+1; elsif switches(0)= "00" then counter <= counter-1;end if;...Oh, and something has fallen outside of the "if rising_edge() then" block... (although this should actually work as written)Due to the sensitivity list the semantics are: - Only when clock changes (either high/low or low/high) if the clock is rising do stuff end if if it is paused by the switch assign counter the value of counter end ifYou will most likely have a warning saying that sw(0) and counter should be added to the sensitivity list,. If you do this, then it changes to "every time the clock changes, or switches(0), or counter changes", and then it all rapidly descends into a mess. Link to comment Share on other sites More sharing options...
alex Posted February 1, 2013 Report Share Posted February 1, 2013 Hey was your intention to compare a sl type with a slv type or did you make a typo (or maybe you know something I don't ) I'd have thought if switches(1 downto 0) = "01" is more... proper. Link to comment Share on other sites More sharing options...
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