Thinking about getting a papilio one... some questions...

[veqtor]

So, I was thinking about getting a Papilio one but I have some questions:

Is it possible to realize an ADC using sigma delta?

Something like this:

http://www.hitequest.../adc_dsigma.jpg

What is the stability of the DAC using sigma delta? Can I use it to control analogue synthesizers, that is, is it stable or jittery?

In a modular, oscillators are controlled using "control-voltage" where 1volt = one octave so that's 0.083333... volts per semitone. That means a 0.001 jitter will be audible instability. So I will probably need an external dac or? I will need to amplify the output to cover something like a +/-5 volts range (10 octaves).

I hate smd soldering, any other options for high-res dacs?

[Pizus]

I didn't understood exactly what you are trying to do. But my 2p advice is that the stability is given by the reference oscillator (don't have the datasheet near so you have to control the jitter /phase noise characteristics). I don't know if there is a direct connection with the oscillator, but in case you should also take into account the FPGA DCM stability figure. Are you going to implent some kind of DDS inside the FPGA?

[Jack Gassett]

So, I was thinking about getting a Papilio one but I have some questions:

Is it possible to realize an ADC using sigma delta?

Something like this:

http://www.hitequest.../adc_dsigma.jpg

It is possible to do an ADC using sigma delta, but you need an external comparator for it to work. The Xilinx app note 155 talks about it. I prefer to go with a SPI ADC like was done with my RetroCade Synth and this SPI Wing. The sigma delta ADC works by sweeping through a voltage range until the comparator indicates that the desired voltage is found, so it's probably not real fast...

What is the stability of the DAC using sigma delta? Can I use it to control analogue synthesizers, that is, is it stable or jittery?

In a modular, oscillators are controlled using "control-voltage" where 1volt = one octave so that's 0.083333... volts per semitone. That means a 0.001 jitter will be audible instability. So I will probably need an external dac or? I will need to amplify the output to cover something like a +/-5 volts range (10 octaves).

I hate smd soldering, any other options for high-res dacs?

The sigma delta DAC is really good, you can read about it in Xilinx app note 154. We use this sigma delta DAC all over the place and it sounds great, there is a wav player that outputs sound that is as good as any CD I've heard. We use it for the Papilio Arcade games and we use it for the output of the RetroCade Synth, which you should take a look at when you get a chance.

Jack.

[veqtor]

It is possible to do an ADC using sigma delta, but you need an external comparator for it to work. The Xilinx app note 155 talks about it. I prefer to go with a SPI ADC like was done with my RetroCade Synth and this SPI Wing. The sigma delta ADC works by sweeping through a voltage range until the comparator indicates that the desired voltage is found, so it's probably not real fast...

The sigma delta DAC is really good, you can read about it in Xilinx app note 154. We use this sigma delta DAC all over the place and it sounds great, there is a wav player that outputs sound that is as good as any CD I've heard. We use it for the Papilio Arcade games and we use it for the output of the RetroCade Synth, which you should take a look at when you get a chance.

Jack.

Cool, I really only wanted to use SD-ADC for reading loads of potentiometers but I guess I'll go for encoders, seems easier.

I think I'll drop controlling an external analog VCO and do waveform synthesis for my project on the FPGA. One more question though, is the SD-DAC good enough, in your opinion to control an external voltage-controlled amplifier? I want to realize an external filter, perhaps with an external dac controlling a SVF or perhaps a steiner-parker filter and I'm considering using an analog VCA after and then it goes to the final output. Other solution would be doing an VCA emulation in the FPGA and that would open up for post-processing I guess. Thoughts?

[hamster]

One more question though, is the SD-DAC good enough, in your opinion to control an external voltage-controlled amplifier? I want to realize an external filter, perhaps with an external dac controlling a SVF or perhaps a steiner-parker filter and I'm considering using an analog VCA after and then it goes to the final output. Other solution would be doing an VCA emulation in the FPGA and that would open up for post-processing I guess. Thoughts?

Hi,

I've been producing and all-digital synth (really simple at the moment, playing Brahm's Lullaby from RAM, but working up to something grand I hope). I'm using a 16 bit SD DAC for output and it sounds sweet. Here my rough and ready analysis that makes sense to me.

With a 32MHz clock, you have to filter to around 500Hz to get a stable output at the absolute margins, as 0x0001 will give one pulse every 65536 cycles - equivilent to a very low duty cycle 500Hz PWM. Likewise when you convert x0004, you get a 2Khz PWM, There is a lot of audio-range crud to filter. Increasing your clock helps somewhat - at 96MHz you need to filter at 1.5KHz. Trying to get more than 200MHz is going to be tricky.

But away from the margins performance is really good - converting 0x4000 with a 32MHz DAC results in a 25% duty cycle wave form at 8Mhz, so even if you filter well out of the audio range at 50kHz you should get a rock-solid output with minimal filtering

However, for a 16 bit DAC it may still take 65,36 cycles for the long term average to be the desired value, so you can't count on having 16 bit accuracy for all values. If the sample is a relative prime of 2616 the output pattern will only repeat after 2^16 cycles

If you are trying to generate the full audio bandwidth you will only have about 1,600 cycles to average over (as you will be filtering at around 20kHz) so you will have at worst case resolution of 10.5 bits, but samples either side will be significantly better (as they will at least be even numbers!).

In summary, as long as you don't need rail to rail output performance will be sweet with simple filtering, and gives around 12 bit resoution running at 200MHz. If you need highier quality rail-to-rail output then go for an external chip.

[hamster]

Oh, you could always look at S/PDIF output - can't get much better quality than that! I've got an example on my WIki at

http://hamsterworks.co.nz/mediawiki/index.php?title=SPDIF_out&oldid=1248

[veqtor]

Sounds like the built in delta-sigmas will be good enough for generating control voltage. I'll run audio in and out of the papilio using external adcs and dacs. My oscs will be somewhat SID-inspired but also take some cues from these cheap solutions on old Roland digital synths. For vcf I'm going to try building a cmos-inverter state-variable filter to get close to the Sid sound. Also I have my eyes on this programmable filter ic that implements a svf using switching capacitors.

The goal is something like four voice synth similar to a sid with a built in sequencer.

[Jack Gassett]

veqtor,

Sounds like a fun project, it might be worth making your VHDL code as a wishbone core that can plug into the RetroCade framework. Then you can use all the existing resources such as the MIDI control, ZPUino, and Dashboards...

Jack.