Zpuino GPIO speed


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I think the "Alpha 4" is quite an old iteration, and that comment mightn't be relevant to current code.

That being said... I did a little checking.

It looks like zpuino_io instantiates a zpuino_intr (interrupt controller) with INTERRUPT_LINES => 18

The interrupts are on signal "ivecs" (17 downto 0);

It then maps the 16 slot interrupts onto "ivecs" (0 to 15).

That does leave 2 interrupt lines "dangling around".

In fact, if you check the build log, you'll see:

WARNING:Xst:653 - Signal <ivecs<17:16>> is used but never assigned. This sourceless signal will be automatically connected to value 00.

That's confirmation that those extra interrupts aren't connected anywhere, and would be optimized away in the actual bitfile.

So, you could use them... but you'd need to mod the VHDL and synth your own bitfile. But if you're making your own... you wouldn't need to rely on those two - as you could just hook the ones exposed for the wishbone bus.

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