Beagle playing with papilio

[voelker]

Hi,

the spartcam projet i did (papilio + ov7670) project i am working on is working nice and i'am looking to extend the processing power of the platform to run more advanced vision algorithm. Having beaglebone (http://beagleboard.org/) i thought it would be nice to get the papilio and beaglebone communicate together. The beaglebone has a GPMC interface so i started working to interface with. So far i got the two to communicate together, i wrote a kernel driver and slave memory interface for the papilio. Transfer rate are still a bit low (21MByte/s writing, 14 MByte/s reading) but i hope to bring some improvement on that point (i target ~40Mbyte/s).

To get the logic inside the papilio interface with the beaglebone i designed bi-directionnal fifos for fast synchronisation free communications. I still struggled to get this working properly. The fifo works, and the interface with the beaglebone works, but i have a bug in the communication that makes the fifo lose one token (16 bit word) for a burst of communication.

I observed the communication and there is a glitch on the read, cs signals of the beaglebone only fo the second word access. All following accesses of the burst looks nice. This glitch occurs randomly but is always present when the data to transfer has most bits to high. I first thought of interference between the lines, but it does not explain why it happens only on second read of the transfer.

If anyone has an idea of what is going on, or a solution, i would be glad to hear it.

[alex]

I'm just taking a wild guess here, but since you say this happens when the bits are mostly high and there's an element of randomness, make sure you're not exceeding the Simultaneous Switching Output capability of the FPGA and suffering from ground bounce.

Refer to DS162 page 36 and UG381 page 31 for SSO planning.

[voelker]

i'll check on that. But why would this happen only on one transfer and not on the others ?

[voelker]

It seems that Alex is right. When switching the databus, there is a noise of ~300mv on the power supply (see picture). If anyone has a solution to this kind of problem, i'd be glad to hear it.

[voelker]

After playing with the oscilloscope and the logic analyzer we found multiple cause of failure.

When transmitting data a voltage drop appears between the two GND (bgealbone and papilio), we tried connecting more GND pins and it only reduced the drop amplitude but the problem remains.

When transmitting data the power supply of the papilio is versy noisy (spikes up to 200mv). Maybe adding 22µF capacitor on the 3.3v rail  may help.

I might also try to shiled my cable using copper tape.

[voelker]

i tried the bus into signal and control, and it improved significantly the noise i get on CS and RD. Next step is to shield these signal and carry multiple ground to prevent cross-talk.

I also made a fix in the HDL that would prevent glitch on the signals using a RS lock and a counter. Using these two fix i can now grab a frame through the papilio with the beaglebone, and compress it to jpeg. I now get around 9MByte/s bandwidth while reading and 18 MByte/s when writing but i hope to double reading speed by working on timings. I now have my papilio + custom camera shield stacked with the beaglebone in a 8cm*8cm*8cm brick. This hold quite a lot of processing power (720Mh arm Cortex A + Spartan 3E) and should be able to run high level vision tasks (SLAM anyone ?). The goal is to design a cape for the beaglebone with a spartan 6 and a camera connector. A custom cape should allow to get rid of noise, and speed-up communication (max theoretical is 200 MByte/s).