Top-level schematic


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I'm planning to create a top-level schematic (along with other ISE files) so that you can easily hack IO components, and synthesize/p&r the whole ZPUino design.

I however feel that ISE schematic capture is very poor. I could eventually do it with eagle 6 once it get out of beta, using some helper scripts.

Do you happen to know any good and free HDL schematic capture program that could be used here ?


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