Xilinx VHDL UART Example

Jack Gassett

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The Xilinx VHDL UART project is an example project for  the Papilio  One FPGA development board. The project is a Xilinx reference design  that has been conveniently packaged up for the Papilio One. There is  also a set of tutorial screencasts that have been recorded to for this design.                            The Xilinx VHDL UART example provides a VHDL example of  how to implement a 3Mb/s UART core on the Papilio One. This example is  extremely compact and fast.

The Xilinx VHDL UART project page is located on Gadget Forge.

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