Search the Community

Showing results for tags 'DCM'.

  • Search By Tags

    Type tags separated by commas.
  • Search By Author

Content Type


  • Community
    • Gadget Factory Reboot 2022
    • Gadget Factory
    • Documentation
    • FPGA Discussions
    • Community Projects
  • Soft Processors
    • Migen/LiteX/Risc-V
    • ZPUino
    • J1 Forth
    • AVR8 Soft Processor
  • Electronics
    • Modules
  • Papilio Platform (Retired)
    • Papilio General Discussion
    • Papilio Pro
    • Papilio One
    • Papilio DUO
    • Papilio Wings
    • DesignLab IDE
    • DesignLab Libraries
    • RetroCade Synth
    • Papilio Arcade
    • Papilio Loader Application
    • Papilio Logic Sniffer
    • Pipistrello
    • Retired
  • Open Bench (Retired)
    • Open Bench Logic Sniffer at Dangerous Prototypes
    • OpenBench Logic Sniffer at Gadget Factory
  • GadgetBox Universal IoT Hardware (Retired)
    • GadgetBox General Discussion
  • Gadget Factory Internal Category


  • Papilio Platform
    • Papilio One
    • Papilio Plus
    • Papilio Wings
    • LogicStart MegaWing
    • ZPUino
    • Papilio Pro
  • Papilio Arcade
  • RetroCade Synth
  • Logic Sniffer
  • FPGAs
  • DesignLab
    • Example Projects
    • Libraries


  • Papilio FPGA
    • Papilio UCF (User Constraint) Files
    • Papilio Bit Files
  • Papilio Arcade
  • RetroCade Synth
  • General
  • Beta (Test) Releases
  • Books

Find results in...

Find results that contain...

Date Created

  • Start


Last Updated

  • Start


Filter by number of...


  • Start





Website URL







Found 2 results

  1. I read the tutorial and it makes sense, I created the DCM using the clock wizard but can't get the code to compile. I get an error "ERROR:Xst:2035 - Port <clk> has illegal connections. This port is connected to an input buffer and other components.". Does anyone know what I need to do to correct the error? Does anyone have an example of code that compiles and works? myDCM.vhd
  2. Hello, I recently ran into a problem driving multiple DCM's from a single external clock source. Ive looked around for solutions and become familiar with Xilinx's documentation for the Spartan's DCM layout. The problem is that you cannot drive more than one DCM from the same external signal because when mapping it will try to duplicate the input clock buffer [1]. The solution is that you must buffer the external signal using IBUF and specifiy the DCMs to be driven by this internal signal. I've implemented a buffer to do this [2] and drive each DCM with this buffered signal. However, I still run into mapping errors when compiling the project. I am not on a computer with my source code or mapping errors at the moment, however I wanted to see if anyone had any insight about this. References: [1] [2]