I decided to also port the Demon 3.07 verilog code to Papilio_One. This version is identical to the code running on the OpenBench Logic Sniffer board except for using 32MHz oscillator and using serial@115200 instead of SPI. It supports both meta data and input pin data query.
The full XISE project can be found here:
250K and 500K bit files are attached.
Let me know if you notice any strange behavior.
View attachment: logic_sniffer_P1_250K.bit
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