Matt Ownby

Powering Papilio One via 5V on 'wings'

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Hello,

I want to use my Papilio One to prototype replacing an old PROM on an arcade PCB from the early 80's.  The PROM gets 5V supplied to one of its pins.  I was just looking at the Papilio One schematic in Eagle and it appears that I should be able to connect the 5V from the arcade PCB to one or more of the 5V outlets on the 'wings' as long as I completely remove the "PWR SELECT" jumper so that power is neither coming from the 5V regulator nor the USB port.  Does this sound reasonable?

(I apparently can't use the PWRIN connector since that seems to require 6V minimum, plus it's more convenient to use the wing anyway if I can)

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I have done it successfully in the past, but make sure the jumper is indeed removed. Also ensure you use as much 5V and GND wing pins as possible to lower noise and increase current capability.

However, I wonder if you are replacing a PROM which used 5V as IO voltage. In this case DO NOT connect it to the wings, since IOs on the FPGA are 3.3V. There are a few solutions to convert those signals, but will depend on the IO standard (TTL or CMOS) that your system uses. If it's a TTL system, then using some 5V-tolerant buffers should do the trick.

I have a design which interfaces a 3.3V FPGA to a 5V TTL system, and seems to be working OK, I can send you a link for the project if you are interested.

Alvie

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8 hours ago, alvieboy said:

If it's a TTL system, then using some 5V-tolerant buffers should do the trick.

I have a design which interfaces a 3.3V FPGA to a 5V TTL system, and seems to be working OK, I can send you a link for the project if you are interested.

Alvie

It is indeed 5V TTL.  I am under the impression that I can just add 300 Ohm series resistors between the 5V outputs and the FPGA inputs (as discussed here: https://www.xilinx.com/support/answers/19146.html ).  Is that not the case?

The PROM is very simple: https://www.datasheetarchive.com/pdf/download.php?id=a8a991d4d97f7b8c9b56a785cdeb8f10562078&type=M&term=MB7052

It has 8 address lines, 2 enables lines, and 4 data outputs.  So I am planning on adding ten 300 ohm series resistors for the address and enable lines.  How does this sound?

 

And yeah, I'd love to check out your project.  I'd like to do more FPGA work in 5V TTL environments in the future.

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