Sign in to follow this  

Lockups when trying to write to Wishbone register.

Recommended Posts

Hi! I'm trying to create a library based on the "Wishbone VHDL" sample i think.

I'm currently stuck trying to write to a wishbone register, the ZPUIno just locks up while the vhdl-module continues to happily tick without any noticeable changes.

I've cross-referenced my code with the simple writeLeds example but I really can't see anything that should cause this lockup, please help!. ( btw I'm on an Papilio Pro board )

Here's my code:

I can see the print of line 13 just fine, line 14 initiates the write, and then it gets stuck and I never seems to reach line 15

which goes to:  <- how i perform the actual register write <-- Here i try to receive/read.

and finally.. <-- unpack and act upon the command. but that never happens either, so i can only assume that something went wrong with the register write inside the zpuino and that the changes to the register were never applied.

Share this post

Link to post
Share on other sites


The code up until the last part looks quite similar to that I have done.

starts looking fishy.

* Normally.. simply always use rising edges (and specially of the clock)

* Your current process will only be "woken" up on a single bit transition(the control bit) but this will never happen unless you enable line 34 again..




Share this post

Link to post
Share on other sites

Create an account or sign in to comment

You need to be a member in order to leave a comment

Create an account

Sign up for a new account in our community. It's easy!

Register a new account

Sign in

Already have an account? Sign in here.

Sign In Now
Sign in to follow this