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keesj

New VHDL Library

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Hi,

I have been working on my first VHDL library for the papillio. Things are starting to work but I have a few annoyances/things I do not understand:

1) When I create a new wishbone library (from VHDL) I en up with the edit_library.ino file that offers me different options like (Define your chip) e.g. sketchdir://Chip_Designer.xise 

Should that code be able to compile/syntax check? I always end up with ERROR: Could not find symbol "mylib_wb" or similar when I press the green arrow

Selection_273.thumb.png.523a290628c0364f6b69e11d0c160e06.png

2) When I edit the target specific files e.g.     sketchdir://circuit/PSL_Papilio_Pro_LX9.xise for example I alway have to "re-add" my vhdl files into the DesignLab library.

How do I fix this issue?

Selection_271.thumb.png.ff655f975821c5ea5b3e13ebac5c3e12.png

 

Selection_272.thumb.png.e5efb3983bedb606f82fcce02ee9309c.png

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