Simple connections of the output Pin "D12" with clk

[majo go 0]

Hallo,

I have simple problem with the output of signal in the schematic of Xilinx.

I've started Xilinx from the simple default Blink file and wand to connect the clk_96Mhz from the ZPUino Soft Processor to D12 of the Pinout.

Everything I tried is going to be an error. Can someone explain me how to do this; ore have a good “tutorial” which is using the Papilio.

I want to do this in the schematics to understand how to do this.

[Jack Gassett 0]

If you try to connect the 96Mhz clock to an external pin you are not going to see anything on a LED attached to that pin, it is going to be too fast. You want to slow down the clock to something you can see.

Please take a look under the symbols area for the Building_Blocks there are pre-made tools to help connect to a 32Mhz clock (which is the default clock for Papilio) and slow the clock down. You can do something like this:

[Jack Gassett 0]

You can also see more tutorials at:

http://learn.gadgetfactory.net/

These may help:

http://gadgetfactory.net/learn/2015/05/13/designlab-another-fpga-circuit-example-2/

http://gadgetfactory.net/learn/2015/05/03/designlab-make-a-simple-fpga-circuit-2/

http://gadgetfactory.net/learn/2017/02/22/fpga-clocking-clocking-wizard-in-xilinx-ise/

[majo go 0]

Thanks for support Jack, now I understand how to use the IO Pins.

 

[Jack Gassett 0]

Awesome! Glad that helped out.

Jack.