Andrew Baldwin

How does data get from the PC to the Spartan-6 Flash

Recommended Posts

Hello Forum,

My first time on a Forum, hope I get the etiquette correct.

Recently got my Papilio Duo and a LogicStart wingy, itching to get it all running. Intend to VHDL, not drag and drop...that's the intention anyway.

Essentially, being from an electronics background, I like to know what's going on. To that end, I've been wading my way through the plethora of Xilinx datasheets associated with the Spartan-6-LX9.

At the moment I have couple of quick questions for the collective forumers

The LX9 FPGA is set with M0 =1 and M1 =0, this sets the device in Serial Master Mode so it will get its configuration bit stream from the Flash on power up or if PROGRAM_B is pulled low, so :

1) How does data from the PC get programmed to the Flash?

2) I see other questions relating to the PC software configuring the FPGA directly through the USB port,, am I missing something in the circuit diagram, I cant see how this is possible? Unless there is something pre-configured, pre-programmed that we are shielded from.......

hope they're not too stupid questions.

Thanks Andrew

Share this post


Link to post
Share on other sites

I've never programmed the Flash: I always use Papilio DUO connected to a PC.  So when I power on my DUO it loads the original bitstream from Flash and the LED blinks, along with all the other pins.

Once the initial configuration is loaded, I can overwrite it from the PC by downloading a bitstream over the Xilinx JTAG pins, which are connected to port 0 of the FTDI chip.  JTAG is always available no matter which other configuration mode is selected by M0/M1.

I don't know how to reprogram the Flash.  I think Gadget Factory has a bitstream you can download using JTAG which temporarily turns the FPGA into a Flash programmer.

Hope this helps!

 

Share this post


Link to post
Share on other sites

@johnbeetem

Thanks for that....now I can see what is being done.

My mistake, I thought all bitstreams where automatically loaded to the FLASH from the PC software, but, what you've pointed out makes perfect sense now.

In normal use, the FTDI device becomes a JTAG programmer sending the configuration directly to the FPGA. Then, if you want to program the FLASH so the board can be stand-alone, there must be an option in the software that firstly JTAGs the FPGA to be the FLASH programmer, using the second serial bus generated by the FTDI device as the data stream...

thanks again

Andrew

Share this post


Link to post
Share on other sites
3 hours ago, Andrew Baldwin said:

In normal use, the FTDI device becomes a JTAG programmer sending the configuration directly to the FPGA. Then, if you want to program the FLASH so the board can be stand-alone, there must be an option in the software that firstly JTAGs the FPGA to be the FLASH programmer, using the second serial bus generated by the FTDI device as the data stream...

Almost got it right :)  First a a flash programming bitfile is sent to the FPGA via JTAG.  This bitfile uses a special library component (BSCAN_SPARTAN6) that allows the logic fabric to access the JTAG port.  Flash SPI programming commands are then sent to the FPGA via JTAG, which will forward them to the flash chip.

Magnus

Share this post


Link to post
Share on other sites

@Magnus,

as always thanks for taking the time to respond. Couple of further questions follow on, I'll apologise in advance, I am quite new to this :) 

1) Is there an app note available on this technique? I can imagine its not a 'unique' application.

2) What's the purpose of the second serial interface from the FTDI device to the FPGA (MPSSE)?

many thanks

Andrew

 

Share this post


Link to post
Share on other sites

Create an account or sign in to comment

You need to be a member in order to leave a comment

Create an account

Sign up for a new account in our community. It's easy!

Register a new account

Sign in

Already have an account? Sign in here.

Sign In Now