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FPGA vs ASICS

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That is like designing a rally car and asking if for best perfomance you should use racing slicks....

Let your engineers use whichever tool works for them - but it won't be C++!

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The economies of scale don't kick in until you are using a few thousand devices a month and your design is fully fixed, there are some FPGA families which are designed to have a slightly easier path to full asic implementation.

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