quicky Posted February 20, 2015 Report Share Posted February 20, 2015 Hi all, When comparing Papilio Duo UCF file available here http://forum.gadgetfactory.net/index.php?/files/file/235-papilio-duo-generic-ucf/ and the one provided with Design Labs I observe some differences. By example the first line mention papilio Pro and not Papilio Duo and then there are some lines related to ext_pins.Is it important or not ? Please find here the complete diff between the 2 files:1c1< # UCF file for the Papilio DUO board---> # UCF file for the Papilio Pro board32a33,34> NET ext_pins_in(0) LOC="P94" | IOSTANDARD=LVTTL; # CLK> TIMESPEC TS_Period_2 = PERIOD "CLK" 31.25 ns HIGH 50%;33a36> NET ext_pins_out(25) LOC="P141" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # TX34a38> NET ext_pins_in(2) LOC="P46" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # RX117a122,141> NET "ext_pins_out<0>" LOC = "P7" | IOSTANDARD=LVTTL | SLEW=FAST;> NET "ext_pins_out<1>" LOC = "P8" | IOSTANDARD=LVTTL | SLEW=FAST ;> NET "ext_pins_out<2>" LOC = "P9" | IOSTANDARD=LVTTL | SLEW=FAST ;> NET "ext_pins_out<3>" LOC = "P10" | IOSTANDARD=LVTTL | SLEW=FAST ;> NET "ext_pins_out<4>" LOC = "P11" | IOSTANDARD=LVTTL | SLEW=FAST ;> NET "ext_pins_out<5>" LOC = "P5" | IOSTANDARD=LVTTL | SLEW=FAST ;> NET "ext_pins_out<6>" LOC = "P2" | IOSTANDARD=LVTTL | SLEW=FAST ;> NET "ext_pins_out<7>" LOC = "P1" | IOSTANDARD=LVTTL | SLEW=FAST ;> NET "ext_pins_out<8>" LOC = "P143" | IOSTANDARD=LVTTL | SLEW=FAST ;> NET "ext_pins_out<9>" LOC = "P142" | IOSTANDARD=LVTTL | SLEW=FAST ;> NET "ext_pins_out<10>" LOC = "P43" | IOSTANDARD=LVTTL | SLEW=FAST ;> NET "ext_pins_out<11>" LOC = "P41" | IOSTANDARD=LVTTL | SLEW=FAST ;> NET "ext_pins_out<12>" LOC = "P40" | IOSTANDARD=LVTTL | SLEW=FAST;> NET "ext_pins_out<13>" LOC = "P35" | IOSTANDARD=LVTTL | SLEW=FAST ;> NET "ext_pins_out<14>" LOC = "P34" | IOSTANDARD=LVTTL | SLEW=FAST ;> NET "ext_pins_out<15>" LOC = "P27" | IOSTANDARD=LVTTL | SLEW=FAST ;> NET "ext_pins_out<16>" LOC = "P29" | IOSTANDARD=LVTTL | SLEW=FAST ;> NET "ext_pins_out<17>" LOC = "P33" | IOSTANDARD=LVTTL | SLEW=FAST ;> NET "ext_pins_out<18>" LOC = "P32" | IOSTANDARD=LVTTL | SLEW=FAST ;> 127a152,160> NET "ext_pins_inout<0>" LOC = "P14" | IOSTANDARD=LVTTL | SLEW=FAST ;> NET "ext_pins_inout<1>" LOC = "P15" | IOSTANDARD=LVTTL | SLEW=FAST ;> NET "ext_pins_inout<2>" LOC = "P16" | IOSTANDARD=LVTTL | SLEW=FAST ;> NET "ext_pins_inout<3>" LOC = "P17" | IOSTANDARD=LVTTL | SLEW=FAST ;> NET "ext_pins_inout<4>" LOC = "P21" | IOSTANDARD=LVTTL | SLEW=FAST ;> NET "ext_pins_inout<5>" LOC = "P22" | IOSTANDARD=LVTTL | SLEW=FAST ;> NET "ext_pins_inout<6>" LOC = "P23" | IOSTANDARD=LVTTL | SLEW=FAST ;> NET "ext_pins_inout<7>" LOC = "P24" | IOSTANDARD=LVTTL | SLEW=FAST ;> 129a163> NET "ext_pins_out(19)" LOC = "P12" | IOSTANDARD=LVTTL | SLEW=FAST;130a165> NET "ext_pins_out(20)" LOC = "P6" | IOSTANDARD=LVTTL | SLEW=FAST ;131a167> NET "ext_pins_out(21)" LOC = "P26" | IOSTANDARD=LVTTL | SLEW=FAST; 133a170> NET ext_pins_out(24) LOC="P38" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # FLASH_CS OK134a172> NET ext_pins_out(22) LOC="P70" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # FLASH_CK OK135a174> NET ext_pins_out(23) LOC="P64" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # FLASH_SI OK136a176> NET ext_pins_in(1) LOC="P65" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # FLASH_SO OK179a220> #NET ext_pins_out(26) LOC="P134" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW; Link to comment Share on other sites More sharing options...
Jack Gassett Posted February 20, 2015 Report Share Posted February 20, 2015 The ext pins are repeats of the other pins and allow only one array to be connected to the ZPUino soft processor. Jack. Link to comment Share on other sites More sharing options...
Recommended Posts
Archived
This topic is now archived and is closed to further replies.