TommyT

Beginner Question

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I just got a PapilioPro with LogicStartMega Wing (ISE WebPack 14.7 and Papilio Loader 2.6 used).

 

My first Bit-File ( first example from 'IntroToSpartanFPGABook') was correctly generated by ISE.

Options:  Family:Spartan 6; Device:XC6SLX9 Package:TQG144; Speed -3

 

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity switches_LEDs is
    Port ( switch_0 : in  STD_LOGIC;
           switch_1 : in  STD_LOGIC;
           LED_0 : out  STD_LOGIC;
           LED_1 : out  STD_LOGIC);
end switches_LEDs;

architecture Behavioral of switches_LEDs is

begin
 LED_0 <= switch_0;
 LED_1 <= switch_1;
end Behavioral;

 

constraints (copied from the above book)

# Constraints for Papilio One
NET switch_1 LOC = "P3" | IOSTANDARD=LVTTL;
NET switch_0 LOC = "P4" | IOSTANDARD=LVTTL;
NET LED_1 LOC = "P16" | IOSTANDARD=LVTTL;
NET LED_0 LOC = "P17" | IOSTANDARD=LVTTL;

 

 

When connecting the Board with Wing to my PC, LEDs 0,2,4 and 6 are flashing.

Transferring the Bit-File with Papilio Loader:

JTAG chainpos: 0 Device IDCODE = 0x24001093    Desc: XC6SLX9
Using devlist.txt
Created from NCD file: switches_LEDs.ncd;UserID=0xFFFFFFFF
Target device: 6slx9tqg144
Created: 2015/02/08 16:15:19
Bitstream length: 2724832 bits

Uploading "C:\Users\Tomuser\Documents\FPGA\switches_LEDs\switches_leds.bit". DNA is 0xb901440d5afe48fe
Done.
Programming time 735.0 ms
USB transactions: Write 175 read 7 retries 0

 

Blinking after uploading stops, but no effect on using any of the switches. 3 of the four digits show '8'.

 

Can you give me a hint how to go further?

(Are the constraints, which were planned for Papilio One) correct ?

 

Thanks!
 

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Hello TommyT,

 

It looks like your constraints are not in the correct pin locations. Please take a look at this chart in the Hardware Guide to see the correct pins for the Papilio Pro:

http://www.papilio.cc/index.php?n=Papilio.LogicStartMegaWing#led

 

switch_0 should be "P114" for the Papilio Pro and so forth.

 

Jack.

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