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rs232 receiver on a papilio pro + logicstart megawing

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forum,

i can't make this example work:

 

http://gadgetfactory.net/learn/2013/12/02/the-quickest-way-to-implement-pc-to-fpga-communication-using-a-papilio-fpga-board/

 

according to the author i should:

 

"Just build the project, download the project to the FPGA, open a terminal program (I recommend “Putty”), connect to the higher number COM port on the Papilio with the following parameters:
  • 9600 baud
  • No parity
  • 1 stop bit
 
Then press some keys to light some LEDs."
 
but the only led that i see blinking, is the TX led on the papilio board (every time i press a key on the terminal emulator, the led blinks - confirming that one byte was transmitted on the line), but the 8 leds on the logicstart megawing don't lit up.
 
So, while trying to debug it, i slightly changed the design:
 
 
1) i connected the data_strobe line to the dp signal of the 7seg and set an initial value of '1' (DP should be off)
2) i flipped the tmp signal ( <= '0' - turning on the DP) insided the if-block when the oversampled_bits vector was checked against the starting bit
3) i "enhanced" the starting bit check, adding the check for the stop bit too
 
what i expected was for the DP to stay off until i sent the first char, but to my surprise the DP was immediately lit up (even if i didn't open the terminal emulator, so having nothing connected to the ttyUSB line - and i was sure the TX led on the papilio boatd was off all the time).
At this point, as another experiment, i changed the check for the stop bit (from "111" to "000"), and again the DP lit up immediately - so, no matter what i checked there, that if-block is always executed.
 
Any idea what i'm doing wrong here or how to debug it?

rs232_rx.tar

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Hey there,

 

That is one of Mike Fields examples, maybe he can help out. I'm also going to be making a DesignLab example in the next couple of weeks.

 

Jack.

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I haven't tried running it, but there seem to be some mistakes in the tutorial:

1. It's shifting bits in from the right, so the last bit received is the least significant bit.  But from the info I've seen, it should be the other way around.

2. While I understand all the explanation of why the TX line is the FPGA's input in the tutorial, it doesn't seem to be the case.  In my own designs I've used that same "TX" pin (T105 on the Papilio Pro) as output.  And while my designs have failed many times in many ways, they've sometimes worked.  Examination of the Papilio Pro schematic and the FT2232D data sheet reveals that they refer to that pin as "RX".  So I think the names TX/RX were switched in the UCF file, to be easier to understand, and then the tutorial explains switching them again.

 

#2 seems more likely to be relevant.  #1 wouldn't make a noticeable difference when illuminating LEDs, it would just get them backwards.

 

Another project I took a look at also seems to use the "P105" pin as output, not input:

https://github.com/alvieboy/ZPUino-HDL/blob/dcache/zpu/hdl/zpuino/boards/papilio-pro/S6LX9/papilio_pro_top.vhd

https://github.com/alvieboy/ZPUino-HDL/blob/dcache/zpu/hdl/zpuino/boards/papilio-pro/S6LX9/papilio_pro.ucf

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Please take a look at this section of the Hardware Guide:

http://www.papilio.cc/index.php?n=Papilio.PapilioPro#PProUSB

 

I've listed the serial pins using MOSI and MISO convention with the FPGA being the master. Hopefully that should make it clear which pins do what. RX and TX convention always get convoluted in my head.

 

Jack.

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