OV7670 Camera and FPGA Board Nexys 4

Recommended Posts

Hello, i've read about fpga project at

and then i have been tryring to compile and synthesize the vhdl program by myself. If i checked syntax one by one, there's no problem (no error). But, when i try to synthesize, the result always not successful because there's no syntax in frame buffer module. 

So, i'm looking for help about how to fix this problem. Then, i also want to know about what is "IP Block Memory Generator" that the project writer's said at hamsterwork. 

I am using OV7670 camera module and Nexys 4 FPGA Board. And i dont know how to connect OV7670 to nexys 4 board. 

Please help me,

thank you





Share this post

Link to post
Share on other sites

For the frame buffer you will need to add an "IP Core" to your project. 


The instructions at should be enough hints to get you started.


I can't publish the code on my WIki as it is © Xilinx, and the resulting files will be different for your board than they are for mine.



Thank you very much Mike. I have succeed generate ip block memory and also succeed compailing the program. Your code at hamsterwork really help me :') 


Share this post

Link to post
Share on other sites

i've tried to connect all the components with hamster code, but the result at monitor lcd tv is "format invalid" or "no signal", then when i compiled the code, there are many warnings. so, what i have to do to fix this?



Share this post

Link to post
Share on other sites

Create an account or sign in to comment

You need to be a member in order to leave a comment

Create an account

Sign up for a new account in our community. It's easy!

Register a new account

Sign in

Already have an account? Sign in here.

Sign In Now