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I raised this question earlier but received  no replies re: "Introducing the Spartan 3E FPGA and
VHDL."
 
Please tell me what is the difference is between the UCF  notation with < > symbols vs. the notation with "  "  symbols?   notation 1 is in book, but notation 2 is in some other sample code I received.
 
Also, it appears that "IOSTANDARD=LVTTL" is not required.
 
notation 1 from the book:
NET LED_1 LOC = "Pxx" | IOSTANDARD=LVTTL;
NET LED_0 LOC = "Pyy" | IOSTANDARD=LVTTL;
 
 
notation 2:
NET "LED<1>"   LOC="Pxx" 
NET "LED<0>"   LOC="Pyy"
 
 

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Notation 1 specifies two signals, LED_1 and LED_2.

Notation 2 specifies a bus LED with two signals.

 

The corresponding HDL code must match the ucf file.

 

VHDL:

 

entity XXX is
  port (
    LED                 : out   std_logic_vector(1 downto 0);
    LED_1               : out   std_logic;
    LED_2               : out   std_logic;
    );
end;

 

Verilog:

 

module XXX (

  output [1:0]    LED,

  output          LED_1,

  output          LED_2

);

 

Magnus

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Yes, it could be, or a set of LEDs that you want to access as a group.

For instance, having the LEDs in a 7-segment display on a bus makes it more convenient to set the digit to display vs. setting the individual segments on the display.

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