LogicStart Shield for the Papilio DUO


Jack Gassett

Recommended Posts

Well, I'm sorry to say I can't see what I am doing wrong. I'm trying to reproduce Ch. 5. of Mike Fields book. I've followed the steps there, making a vhd file and a ucf file. All appears to build fine, but when I load the bit file into the board. the leds all stay off and do not change when I alter switches 0 and 1.

 

(I have previously loaded the Logic Shield Demo into the board, and it appears to run fine - so I don't there is anything fundamentally wrong with my setup).

 

My files say

 

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity Switches_LEDs is
    Port ( SW0 : in  STD_LOGIC;
           SW1 : in  STD_LOGIC;
           LED0 : out  STD_LOGIC;
           LED1 : out  STD_LOGIC);
end Switches_LEDs;
architecture Behavioral of Switches_LEDs is
begin
LED0 <= SW0;
LED1 <= SW1;
end Behavioral;

 

and

 

NET SW0            LOC="P116" | IOSTANDARD=LVTTL;                                # A0
NET SW1            LOC="P117" | IOSTANDARD=LVTTL;                                # A1
NET LED0           LOC="P55"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # C13
NET LED1           LOC="P50"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # C14
 
If anyone has a clue as to what I might be doing wrong, I'd love to know. (This was all done just in the Xilinx ISE, not the DesignLab.)
Is it perhaps due to the pins being shared with the AVR? I don't think  so though, as I tried doing this all in DesignLab too, and included the AVR disabler, but got a similar result.
Link to comment
Share on other sites

  • Replies 56
  • Created
  • Last Reply

Hi Jack, thanks for the reply.

That does not seem to be the problem. Both my project and a working Hello Wolrd say:

Family Spartan 6

Device XC6SLS9

Package TQG144

Speed -2

and all the other settings are the same too.

I'm a bit stumped!

Ralph

 

PS. Just tried again from scratch, and its all working now. I'm not sure what I did wrong the first time! Thanks for the help.

Link to comment
Share on other sites

Ralph -- One thing that failed for me, on my very first design, was that somehow Xilinx ISE didn't read the UCF I gave it, and ended up assigning the wrong pins to everything.  I don't know why it did that for me, and I have no way of knowing if that's what happened to you.  But it's one possible explanation.  Glad to hear it's working now.

Link to comment
Share on other sites

Thanks, Jaxartes - I think something like that could well be the answer. I seem to remember when it wasn't working, the pin assignments didn't look as expected even though the UCF file was present. Perhaps there's some trick to making the UCF file "stick".

Link to comment
Share on other sites

Jack,

 

I think you got the design of the LogicStart shield just about right. 8 LEDs and switches and a 7-segment display that can show a 16 bit number.

 

IMHO - It's the correct mix of LEDS and switches to allow simple interaction with the FPGA.

 

I started programming mcus back in the early '80s - when all you got was a hex keypad and a 7 segment display. VGA and audio is a bonus

 

regards

 

Ken

Link to comment
Share on other sites

  • 2 weeks later...

Agreed. Having got over the hurdle of how to get started, I'm having great fun. So far I've been playing some square waves through the audio port, doing a counter on the 7 segment leds, and other little things to get up to speed on FPGAs - I've been trying drawing circuits, and writing them in VHDL and Verilog.   At the moment, I'm mainly sticking to using the FPGA side without the ZPUino (Hey, I know the point is that I can combine code for the ZPUino or AVR and draw circuits with ISE, but I already know about arduinos and programming, so wanted to do some new stuff!) Nice board, and nice software.

Link to comment
Share on other sites

Archived

This topic is now archived and is closed to further replies.